Searched +full:0 +full:x90000010 (Results 1 – 7 of 7) sorted by relevance
| /openbmc/u-boot/cmd/aspeed/ |
| H A D | dptest.h | 8 #define SYS_REST 0x1e6e2040
9 #define SYS_REST_CLR 0x1e6e2044
12 #define DP_TX_INT_CLEAR 0x1e6eb040
13 #define DP_TX_INT_STATUS 0x1e6eb044
15 #define DP_TX_IRQ_CFG 0x1e6eb080
16 #define DP_TX_EVENT_CFG 0x1e6eb084
18 #define DP_AUX_REQ_CFG 0x1e6eb088
19 #define DP_AUX_ADDR_LEN 0x1e6eb08c
20 #define DP_AUX_STATUS 0x1e6eb0b0
22 #define DP_AUX_W_D_0 0x1e6eb090
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| /openbmc/linux/Documentation/devicetree/bindings/cpu/ |
| H A D | idle-states.yaml | 102 between 0 and infinite time, until a wake-up event occurs.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
167 0| 1 time(ms)
172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
380 #size-cells = <0>;
383 cpu@0 {
386 reg = <0x0 0x0>;
395 reg = <0x0 0x1>;
404 reg = <0x0 0x100>;
413 reg = <0x0 0x101>;
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| /openbmc/linux/sound/pci/asihpi/ |
| H A D | hpi6205.c | 56 #define C6205_HSR_INTSRC 0x01
57 #define C6205_HSR_INTAVAL 0x02
58 #define C6205_HSR_INTAM 0x04
59 #define C6205_HSR_CFGERR 0x08
60 #define C6205_HSR_EEREAD 0x10
62 #define C6205_HDCR_WARMRESET 0x01
63 #define C6205_HDCR_DSPINT 0x02
64 #define C6205_HDCR_PCIBOOT 0x04
67 #define C6205_DSPP_MAP1 0x400
71 * of DSP memory mapped registers (starting at 0x01800000).
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| /openbmc/linux/drivers/net/wireless/realtek/rtw88/ |
| H A D | rtw8822b_table.c | 10 0x029, 0x000000F9,
11 0x420, 0x00000080,
12 0x421, 0x0000001F,
13 0x428, 0x0000000A,
14 0x429, 0x00000010,
15 0x430, 0x00000000,
16 0x431, 0x00000000,
17 0x432, 0x00000000,
18 0x433, 0x00000001,
19 0x434, 0x00000004,
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| /openbmc/linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | SA-1100.h | 30 #define SA1100_CS0_PHYS 0x00000000
31 #define SA1100_CS1_PHYS 0x08000000
32 #define SA1100_CS2_PHYS 0x10000000
33 #define SA1100_CS3_PHYS 0x18000000
34 #define SA1100_CS4_PHYS 0x40000000
35 #define SA1100_CS5_PHYS 0x48000000
41 #define PCMCIAPrtSp 0x04000000 /* PCMCIA Partition Space [byte] */
47 #define PCMCIA0Sp PCMCIASp /* PCMCIA 0 Space [byte] */
48 #define PCMCIA0IOSp PCMCIAIOSp /* PCMCIA 0 I/O Space [byte] */
49 #define PCMCIA0AttrSp PCMCIAAttrSp /* PCMCIA 0 Attribute Space [byte] */
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| /openbmc/linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | memory.json | 5 "EventCode": "0xA3",
8 "UMask": "0x2"
13 "EventCode": "0xA3",
16 "UMask": "0x6"
20 "EventCode": "0xC8",
25 "UMask": "0x4"
29 "EventCode": "0xC8",
32 "UMask": "0x80"
36 "EventCode": "0xC8",
39 "UMask": "0x8"
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| /openbmc/u-boot/include/ |
| H A D | SA-1100.h | 35 #define C 0
53 #define MemBnkSp 0x08000000 /* Memory Bank Space [byte] */
56 #define StMemBnk0Sp StMemBnkSp /* Static Memory Bank 0 Space */
66 #define DRAMBnk0Sp DRAMBnkSp /* DRAM Bank 0 Space [byte] */
73 #define _StMemBnk(Nb) /* Static Memory Bank [0..3] */ \
74 (0x00000000 + (Nb)*StMemBnkSp)
75 #define _StMemBnk0 _StMemBnk (0) /* Static Memory Bank 0 */
82 #define StMemBnk /* Static Memory Bank [0..3] */ \
83 ((StMemBnkType *) io_p2v (_StMemBnk (0)))
84 #define StMemBnk0 (StMemBnk [0]) /* Static Memory Bank 0 */
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