Searched +full:0 +full:x89010000 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/mtd/ |
| H A D | st,stm32-fmc2-nand.yaml | 63 - description: Chip select 0 data
64 - description: Chip select 0 command
65 - description: Chip select 0 address space
88 - description: Chip select 0 data
89 - description: Chip select 0 command
90 - description: Chip select 0 address space
110 reg = <0x58002000 0x1000>,
111 <0x80000000 0x1000>,
112 <0x88010000 0x1000>,
113 <0x88020000 0x1000>,
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| /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt7915/ |
| H A D | mmio.c | 21 [INT_SOURCE_CSR] = 0xd7010,
22 [INT_MASK_CSR] = 0xd7014,
23 [INT1_SOURCE_CSR] = 0xd7088,
24 [INT1_MASK_CSR] = 0xd708c,
25 [INT_MCU_CMD_SOURCE] = 0xd51f0,
26 [INT_MCU_CMD_EVENT] = 0x3108,
27 [WFDMA0_ADDR] = 0xd4000,
28 [WFDMA0_PCIE1_ADDR] = 0xd8000,
29 [WFDMA_EXT_CSR_ADDR] = 0xd7000,
30 [CBTOP1_PHY_END] = 0x77ffffff,
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| H A D | regs.h | 129 #define MT_MCU_WFDMA0_BASE 0x2000
132 #define MT_MCU_WFDMA0_DUMMY_CR MT_MCU_WFDMA0(0x120)
135 #define MT_MCU_WFDMA1_BASE 0x3000
139 #define MT_MCU_INT_EVENT_DMA_STOPPED BIT(0)
145 #define MT_PLE_BASE 0x820c0000
148 #define MT_PLE_HOST_RPT0 MT_PLE(0x030)
153 #define MT_FL_Q2_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0x8)
154 #define MT_FL_Q3_CTRL MT_PLE(__OFFS(PLE_FL_Q_CTRL) + 0xc)
164 #define MT_PLE_AMSDU_PACK_MSDU_CNT(n) MT_PLE(0x10e0 + ((n) << 2))
166 #define MT_PSE_BASE 0x820c8000
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