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Searched +full:0 +full:x84c0 (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vce/
H A Dvce_2_0_d.h27 #define mmVCE_STATUS 0x8001
28 #define mmVCE_VCPU_CNTL 0x8005
29 #define mmVCE_VCPU_CACHE_OFFSET0 0x8009
30 #define mmVCE_VCPU_CACHE_SIZE0 0x800a
31 #define mmVCE_VCPU_CACHE_OFFSET1 0x800b
32 #define mmVCE_VCPU_CACHE_SIZE1 0x800c
33 #define mmVCE_VCPU_CACHE_OFFSET2 0x800d
34 #define mmVCE_VCPU_CACHE_SIZE2 0x800e
35 #define mmVCE_SOFT_RESET 0x8048
36 #define mmVCE_RB_BASE_LO2 0x805b
[all …]
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Damlogic,meson-uart.yaml96 reg = <0x84c0 0x14>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx93.c58 { IMX93_CLK_A55_PERIPH, "a55_periph_root", 0x0000, FAST_SEL, CLK_IS_CRITICAL },
59 { IMX93_CLK_A55_MTR_BUS, "a55_mtr_bus_root", 0x0080, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
60 { IMX93_CLK_A55, "a55_alt_root", 0x0100, FAST_SEL, CLK_IS_CRITICAL },
61 { IMX93_CLK_M33, "m33_root", 0x0180, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
62 { IMX93_CLK_BUS_WAKEUP, "bus_wakeup_root", 0x0280, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
63 { IMX93_CLK_BUS_AON, "bus_aon_root", 0x0300, LOW_SPEED_IO_SEL, CLK_IS_CRITICAL },
64 { IMX93_CLK_WAKEUP_AXI, "wakeup_axi_root", 0x0380, FAST_SEL, CLK_IS_CRITICAL },
65 { IMX93_CLK_SWO_TRACE, "swo_trace_root", 0x0400, LOW_SPEED_IO_SEL, },
66 { IMX93_CLK_M33_SYSTICK, "m33_systick_root", 0x0480, LOW_SPEED_IO_SEL, },
67 { IMX93_CLK_FLEXIO1, "flexio1_root", 0x0500, LOW_SPEED_IO_SEL, },
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Dm54xxpci.h21 #define PCIIDR (CONFIG_MBAR + 0xb00) /* PCI device/vendor ID */
22 #define PCISCR (CONFIG_MBAR + 0xb04) /* PCI status/command */
23 #define PCICCRIR (CONFIG_MBAR + 0xb08) /* PCI class/revision */
24 #define PCICR1 (CONFIG_MBAR + 0xb0c) /* PCI configuration 1 */
25 #define PCIBAR0 (CONFIG_MBAR + 0xb10) /* PCI base address 0 */
26 #define PCIBAR1 (CONFIG_MBAR + 0xb14) /* PCI base address 1 */
27 #define PCICCPR (CONFIG_MBAR + 0xb28) /* PCI cardbus CIS pointer */
28 #define PCISID (CONFIG_MBAR + 0xb2c) /* PCI subsystem IDs */
29 #define PCIERBAR (CONFIG_MBAR + 0xb30) /* PCI expansion ROM */
30 #define PCICPR (CONFIG_MBAR + 0xb34) /* PCI capabilities pointer */
[all …]
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson.dtsi28 reg = <0xc1100000 0x200000>;
31 ranges = <0x0 0xc1100000 0x200000>;
37 reg = <0x4000 0x400>;
44 reg = <0x5400 0x2ac>;
53 reg = <0x7c00 0x200>;
58 reg = <0x8100 0x8>;
63 reg = <0x84c0 0x18>;
71 reg = <0x84dc 0x18>;
78 reg = <0x8500 0x20>;
81 #size-cells = <0>;
[all …]
/openbmc/linux/include/linux/mfd/mt6332/
H A Dregisters.h10 #define MT6332_HWCID 0x8000
11 #define MT6332_SWCID 0x8002
12 #define MT6332_TOP_CON 0x8004
13 #define MT6332_DDR_VREF_AP_CON 0x8006
14 #define MT6332_DDR_VREF_DQ_CON 0x8008
15 #define MT6332_DDR_VREF_CA_CON 0x800A
16 #define MT6332_TEST_OUT 0x800C
17 #define MT6332_TEST_CON0 0x800E
18 #define MT6332_TEST_CON1 0x8010
19 #define MT6332_TESTMODE_SW 0x8012
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gx.dtsi27 hwrom_reserved: hwrom@0 {
28 reg = <0x0 0x0 0x0 0x1000000>;
34 reg = <0x0 0x10000000 0x0 0x200000>;
40 reg = <0x0 0x05000000 0x0 0x300000>;
47 size = <0x0 0x10000000>;
48 alignment = <0x0 0x400000>;
54 #address-cells = <0x2>;
55 #size-cells = <0x0>;
57 cpu0: cpu@0 {
60 reg = <0x0 0x0>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gx.dtsi35 hwrom_reserved: hwrom@0 {
36 reg = <0x0 0x0 0x0 0x1000000>;
42 reg = <0x0 0x10000000 0x0 0x200000>;
48 reg = <0x0 0x05000000 0x0 0x300000>;
54 reg = <0x0 0x05300000 0x0 0x2000000>;
61 size = <0x0 0x10000000>;
62 alignment = <0x0 0x400000>;
90 #address-cells = <0x2>;
91 #size-cells = <0x0>;
93 cpu0: cpu@0 {
[all …]
/openbmc/linux/include/video/
H A Dpm3fb.h19 #define PM3ResetStatus 0x0000
20 #define PM3IntEnable 0x0008
21 #define PM3IntFlags 0x0010
22 #define PM3InFIFOSpace 0x0018
23 #define PM3OutFIFOWords 0x0020
24 #define PM3DMAAddress 0x0028
25 #define PM3DMACount 0x0030
26 #define PM3ErrorFlags 0x0038
27 #define PM3VClkCtl 0x0040
28 #define PM3TestRegister 0x0048
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dhi847.c25 #define HI847_REG_CHIP_ID 0x0716
26 #define HI847_CHIP_ID 0x0847
28 #define HI847_REG_MODE_SELECT 0x0B00
29 #define HI847_MODE_STANDBY 0x0000
30 #define HI847_MODE_STREAMING 0x0100
32 #define HI847_REG_MODE_TG 0x027E
33 #define HI847_REG_MODE_TG_ENABLE 0x0100
34 #define HI847_REG_MODE_TG_DISABLE 0x0000
37 #define HI847_REG_FLL 0x020E
38 #define HI847_FLL_30FPS 0x0B51
[all …]
/openbmc/linux/sound/soc/codecs/
H A Drt5631.c39 { RT5631_SPK_OUT_VOL, 0x8888 },
40 { RT5631_HP_OUT_VOL, 0x8080 },
41 { RT5631_MONO_AXO_1_2_VOL, 0xa080 },
42 { RT5631_AUX_IN_VOL, 0x0808 },
43 { RT5631_ADC_REC_MIXER, 0xf0f0 },
44 { RT5631_VDAC_DIG_VOL, 0x0010 },
45 { RT5631_OUTMIXER_L_CTRL, 0xffc0 },
46 { RT5631_OUTMIXER_R_CTRL, 0xffc0 },
47 { RT5631_AXO1MIXER_CTRL, 0x88c0 },
48 { RT5631_AXO2MIXER_CTRL, 0x88c0 },
[all …]
/openbmc/linux/fs/nls/
H A Dnls_cp950.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x3000,0xFF0C,0x3001,0x3002,0xFF0E,0x2027,0xFF1B,0xFF1A,/* 0x40-0x47 */
26 0xFF1F,0xFF01,0xFE30,0x2026,0x2025,0xFE50,0xFE51,0xFE52,/* 0x48-0x4F */
[all …]
H A Dnls_cp936.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x4E02,0x4E04,0x4E05,0x4E06,0x4E0F,0x4E12,0x4E17,0x4E1F,/* 0x40-0x47 */
26 0x4E20,0x4E21,0x4E23,0x4E26,0x4E29,0x4E2E,0x4E2F,0x4E31,/* 0x48-0x4F */
[all …]
H A Dnls_cp949.c17 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x00-0x07 */
18 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x08-0x0F */
19 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x10-0x17 */
20 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x18-0x1F */
21 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x20-0x27 */
22 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x28-0x2F */
23 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x30-0x37 */
24 0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,0x0000,/* 0x38-0x3F */
25 0x0000,0xAC02,0xAC03,0xAC05,0xAC06,0xAC0B,0xAC0C,0xAC0D,/* 0x40-0x47 */
26 0xAC0E,0xAC0F,0xAC18,0xAC1E,0xAC1F,0xAC21,0xAC22,0xAC23,/* 0x48-0x4F */
[all …]