Lines Matching +full:0 +full:x84c0
27 hwrom_reserved: hwrom@0 {
28 reg = <0x0 0x0 0x0 0x1000000>;
34 reg = <0x0 0x10000000 0x0 0x200000>;
40 reg = <0x0 0x05000000 0x0 0x300000>;
47 size = <0x0 0x10000000>;
48 alignment = <0x0 0x400000>;
54 #address-cells = <0x2>;
55 #size-cells = <0x0>;
57 cpu0: cpu@0 {
60 reg = <0x0 0x0>;
63 clocks = <&scpi_dvfs 0>;
69 reg = <0x0 0x1>;
72 clocks = <&scpi_dvfs 0>;
78 reg = <0x0 0x2>;
81 clocks = <&scpi_dvfs 0>;
87 reg = <0x0 0x3>;
90 clocks = <&scpi_dvfs 0>;
115 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
117 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
119 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
121 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
128 #clock-cells = <0>;
144 reg = <0x14 0x10>;
148 reg = <0x34 0x10>;
152 reg = <0x46 0x30>;
164 scpi_dvfs: scpi_clocks@0 {
167 clock-indices = <0>;
186 reg = <0x0 0xc1100000 0x0 0x100000>;
189 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
193 reg = <0x0 0x9880 0x0 0x10>;
202 reg = <0x0 0x04404 0x0 0x9c>;
208 reg = <0x0 0x84c0 0x0 0x18>;
215 reg = <0x0 0x84dc 0x0 0x18>;
222 reg = <0x0 0x08500 0x0 0x20>;
225 #size-cells = <0>;
231 reg = <0x0 0x08550 0x0 0x10>;
238 reg = <0x0 0x08650 0x0 0x10>;
245 reg = <0x0 0x8680 0x0 0x34>;
253 reg = <0x0 0x086c0 0x0 0x10>;
260 reg = <0x0 0x8700 0x0 0x18>;
267 reg = <0x0 0x087c0 0x0 0x20>;
270 #size-cells = <0>;
276 reg = <0x0 0x087e0 0x0 0x20>;
279 #size-cells = <0>;
285 reg = <0x0 0x08d80 0x0 0x80>;
288 #size-cells = <0>;
294 reg = <0x0 0x08c80 0x0 0x80>;
296 #size-cells = <0>;
302 reg = <0x0 0x098d0 0x0 0x10>;
309 reg = <0x0 0xc4301000 0 0x1000>,
310 <0x0 0xc4302000 0 0x2000>,
311 <0x0 0xc4304000 0 0x2000>,
312 <0x0 0xc4306000 0 0x2000>;
317 #address-cells = <0>;
322 reg = <0x0 0xc8000000 0x0 0x14000>;
326 ranges = <0 0x0 0xc8000000 0x14000>;
328 cpu_scp_lpri: scp-shmem@0 {
330 reg = <0x13000 0x400>;
335 reg = <0x13400 0x400>;
341 reg = <0x0 0xc8100000 0x0 0x100000>;
344 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
346 sysctrl_AO: sys-ctrl@0 {
348 reg = <0x0 0x0 0x0 0x100>;
352 #power-domain-cells = <0>;
365 reg = <0x0 0x00100 0x0 0x14>;
371 reg = <0x0 0x140 0x0 0x140>;
377 reg = <0x0 0x004c0 0x0 0x18>;
384 reg = <0x0 0x004e0 0x0 0x18>;
391 reg = <0x0 0x500 0x0 0x20>;
394 #size-cells = <0>;
400 reg = <0x0 0x00550 0x0 0x10>;
407 reg = <0x0 0x00580 0x0 0x40>;
415 reg = <0x0 0xc8834000 0x0 0x2000>;
418 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
422 reg = <0x0 0x0 0x0 0x4>;
428 reg = <0x0 0xc8838000 0x0 0x400>;
431 ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
435 reg = <0x0 0x48 0x0 0x14>;
441 reg = <0x0 0xc883c000 0x0 0x2000>;
444 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
446 sysctrl: system-controller@0 {
448 reg = <0 0 0 0x400>;
453 reg = <0 0x404 0 0x4c>;
463 reg = <0x0 0xc9410000 0x0 0x10000
464 0x0 0xc8834540 0x0 0x4>;
472 reg = <0x0 0xd0000000 0x0 0x200000>;
475 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
479 reg = <0x0 0x70000 0x0 0x800>;
486 reg = <0x0 0x72000 0x0 0x800>;
493 reg = <0x0 0x74000 0x0 0x800>;
501 reg = <0x0 0xd0100000 0x0 0x100000>,
502 <0x0 0xc883c000 0x0 0x1000>,
503 <0x0 0xc8838000 0x0 0x1000>;
507 #size-cells = <0>;
510 cvbs_vdac_port: port@0 {
511 reg = <0>;
526 reg = <0x0 0xc883a000 0x0 0x1c>;
529 #size-cells = <0>;
533 hdmi_tx_venc_port: port@0 {
534 reg = <0>;