Searched +full:0 +full:x82010000 (Results 1 – 3 of 3) sorted by relevance
144 reg = <0x0 0x7d500000 0x9310>;152 interrupt-map-mask = <0x0 0x0 0x0 0x7>;153 interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH154 0 0 0 2 &gicv2 GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH155 0 0 0 3 &gicv2 GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH156 0 0 0 4 &gicv2 GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;160 ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>;161 dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>,162 <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>;164 brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>;[all …]
16 Hit any key to stop autoboot: 017 U-Boot# sf probe 019 U-Boot# sf erase 0 0x8000020 SF: 524288 bytes @ 0x0 Erased: OK21 U-Boot# mw 81000000 0xdededede 0x4000022 U-Boot# sf write 81000000 0 0x4000023 SF: 262144 bytes @ 0x0 Written: OK24 U-Boot# sf read 82000000 0 0x4000025 SF: 262144 bytes @ 0x0 Read: OK26 U-Boot# md 0x82000000[all …]
19 #clock-cells = <0>;21 clock-frequency = <0>;26 #size-cells = <0>;36 cpu0: cpu@0 {38 reg = <0>;44 L2_CA53: cache-controller-0 {61 #address-cells = <0>;63 reg = <0x0 0x82010000 0 0x1000>,64 <0x0 0x82020000 0 0x20000>,65 <0x0 0x82040000 0 0x20000>,[all …]