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/openbmc/linux/drivers/gpu/drm/bridge/
H A Dlontium-lt9211.c31 #define REG_PAGE_CONTROL 0xff
32 #define REG_CHIPID0 0x8100
33 #define REG_CHIPID0_VALUE 0x18
34 #define REG_CHIPID1 0x8101
35 #define REG_CHIPID1_VALUE 0x01
36 #define REG_CHIPID2 0x8102
37 #define REG_CHIPID2_VALUE 0xe3
39 #define REG_DSI_LANE 0xd000
40 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
56 regmap_reg_range(0xff, 0xff),
[all …]
H A Dlontium-lt9611.c29 #define KEY_DDC_ACCS_DONE 0x02
30 #define DDC_NO_ACK 0x50
32 #define LT9611_4LANES 0
64 #define LT9611_PAGE_CONTROL 0xff
69 .range_min = 0,
70 .range_max = 0x85ff,
72 .selector_mask = 0xff,
73 .selector_shift = 0,
74 .window_start = 0,
75 .window_len = 0x100,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Damlogic,meson8-pinctrl-cbus.yaml32 "^bank@[0-9a-z]+$":
65 reg = <0x80b0 0x28>,
66 <0x80e8 0x18>,
67 <0x8120 0x18>,
68 <0x8030 0x30>;
72 gpio-ranges = <&pinctrl_cbus 0 0 120>;
/openbmc/linux/drivers/usb/cdns3/
H A Dhost.c26 #define XECP_PORT_CAP_REG 0x8000
27 #define XECP_AUX_CTRL_REG1 0x8120
56 return 0; in xhci_cdns3_resume_quirk()
124 return 0; in __cdns_host_init()
156 return 0; in cdns_host_init()
H A Dcdns3-imx.c21 #define USB3_CORE_CTRL1 0x00
22 #define USB3_CORE_CTRL2 0x04
23 #define USB3_INT_REG 0x08
24 #define USB3_CORE_STATUS 0x0c
25 #define XHCI_DEBUG_LINK_ST 0x10
26 #define XHCI_DEBUG_BUS 0x14
27 #define USB3_SSPHY_CTRL1 0x40
28 #define USB3_SSPHY_CTRL2 0x44
29 #define USB3_SSPHY_STATUS 0x4c
30 #define USB2_PHY_CTRL1 0x50
[all …]
/openbmc/libmctp/
H A Dcrc-16-ccitt.c12 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, 0x8c48,
13 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, 0x1081, 0x0108,
14 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, 0x9cc9, 0x8d40, 0xbfdb,
15 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, 0x2102, 0x308b, 0x0210, 0x1399,
16 0x6726, 0x76af, 0x4434, 0x55bd, 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e,
17 0xfae7, 0xc87c, 0xd9f5, 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e,
18 0x54b5, 0x453c, 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd,
19 0xc974, 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
20 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, 0x5285,
21 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, 0xdecd, 0xcf44,
[all …]
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drpm.h14 #define PCI_DEVID_CN10K_RPM 0xA060
15 #define PCI_SUBSYS_DEVID_CNF10KB_RPM 0xBC00
16 #define PCI_DEVID_CN10KB_RPM 0xA09F
19 #define RPMX_CMRX_CFG 0x00
20 #define RPMX_CMR_GLOBAL_CFG 0x08
24 #define RPMX_CMRX_RX_ID_MAP 0x80
25 #define RPMX_CMRX_SW_INT 0x180
26 #define RPMX_CMRX_SW_INT_W1S 0x188
27 #define RPMX_CMRX_SW_INT_ENA_W1S 0x198
28 #define RPMX_CMRX_LINK_CFG 0x1070
[all …]
/openbmc/qemu/util/
H A Dcrc-ccitt.c20 * be seen in entry 128, 0x8408. This corresponds to x^0 + x^5 + x^12.
24 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
25 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
26 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
27 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
28 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
29 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
30 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
31 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
32 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
[all …]
/openbmc/linux/lib/
H A Dcrc-ccitt.c13 * be seen in entry 128, 0x8408. This corresponds to x^0 + x^5 + x^12.
17 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf,
18 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7,
19 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e,
20 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876,
21 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd,
22 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5,
23 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c,
24 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974,
25 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb,
[all …]
/openbmc/linux/include/linux/mfd/mt6332/
H A Dregisters.h10 #define MT6332_HWCID 0x8000
11 #define MT6332_SWCID 0x8002
12 #define MT6332_TOP_CON 0x8004
13 #define MT6332_DDR_VREF_AP_CON 0x8006
14 #define MT6332_DDR_VREF_DQ_CON 0x8008
15 #define MT6332_DDR_VREF_CA_CON 0x800A
16 #define MT6332_TEST_OUT 0x800C
17 #define MT6332_TEST_CON0 0x800E
18 #define MT6332_TEST_CON1 0x8010
19 #define MT6332_TESTMODE_SW 0x8012
[all …]
/openbmc/linux/drivers/net/ethernet/ibm/emac/
H A Dphy.c69 if (val >= 0 && (val & BMCR_RESET) == 0) in emac_mii_reset_phy()
73 if ((val & BMCR_ISOLATE) && limit > 0) in emac_mii_reset_phy()
76 return limit <= 0; in emac_mii_reset_phy()
93 if (val >= 0 && (val & BMCR_RESET) == 0) in emac_mii_reset_gpcs()
97 if ((val & BMCR_ISOLATE) && limit > 0) in emac_mii_reset_gpcs()
100 if (limit > 0 && phy->mode == PHY_INTERFACE_MODE_SGMII) { in emac_mii_reset_gpcs()
102 gpcs_phy_write(phy, 0x04, 0x8120); /* AsymPause, FDX */ in emac_mii_reset_gpcs()
103 gpcs_phy_write(phy, 0x07, 0x2801); /* msg_pg, toggle */ in emac_mii_reset_gpcs()
104 gpcs_phy_write(phy, 0x00, 0x0140); /* 1Gbps, FDX */ in emac_mii_reset_gpcs()
107 return limit <= 0; in emac_mii_reset_gpcs()
[all …]
/openbmc/linux/arch/arm/boot/dts/amlogic/
H A Dmeson8b.dtsi19 #size-cells = <0>;
25 reg = <0x200>;
37 reg = <0x201>;
49 reg = <0x202>;
61 reg = <0x203>;
169 hwrom@0 {
170 reg = <0x0 0x200000>;
225 reg = <0xc8000000 0x8000>;
228 ranges = <0x0 0xc8000000 0x8000>;
232 reg = <0x400 0x20>;
[all …]
H A Dmeson8.dtsi21 #size-cells = <0>;
27 reg = <0x200>;
39 reg = <0x201>;
51 reg = <0x202>;
63 reg = <0x203>;
177 hwrom@0 {
178 reg = <0x0 0x200000>;
193 reg = <0x4f00000 0x100000>;
248 reg = <0xc8000000 0x8000>;
251 ranges = <0x0 0xc8000000 0x8000>;
[all …]
/openbmc/linux/drivers/usb/serial/
H A Dqcserial.c21 #define QUECTEL_EC20_PID 0x9215
25 QCSERIAL_G2K = 0, /* Gobi 2000 */
40 {DEVICE_G1K(0x05c6, 0x9211)}, /* Acer Gobi QDL device */
41 {DEVICE_G1K(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */
42 {DEVICE_G1K(0x03f0, 0x1f1d)}, /* HP un2400 Gobi Modem Device */
43 {DEVICE_G1K(0x03f0, 0x201d)}, /* HP un2400 Gobi QDL Device */
44 {DEVICE_G1K(0x04da, 0x250d)}, /* Panasonic Gobi Modem device */
45 {DEVICE_G1K(0x04da, 0x250c)}, /* Panasonic Gobi QDL device */
46 {DEVICE_G1K(0x413c, 0x8172)}, /* Dell Gobi Modem device */
47 {DEVICE_G1K(0x413c, 0x8171)}, /* Dell Gobi QDL device */
[all …]
/openbmc/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc_hw.h10 #define ENETC_DEV_ID_PF 0xe100
11 #define ENETC_DEV_ID_VF 0xef00
12 #define ENETC_DEV_ID_PTP 0xee02
15 #define ENETC_BAR_REGS 0
17 /** SI regs, offset: 0h */
18 #define ENETC_SIMR 0
20 #define ENETC_SIMR_RSSE BIT(0)
21 #define ENETC_SICTR0 0x18
22 #define ENETC_SICTR1 0x1c
23 #define ENETC_SIPCAPR0 0x20
[all …]
/openbmc/linux/drivers/media/usb/gspca/
H A Dspca500.c26 #define AgfaCl20 0
55 .priv = 0},
68 .priv = 0},
87 {0x00, 0x0003, 0x816b}, /* SSI not active sync with vsync,
88 * hue (H byte) = 0,
92 {0x00, 0x0000, 0x8167}, /* brightness = 0 */
93 {0x00, 0x0020, 0x8168}, /* contrast = 0 */
94 {0x00, 0x0003, 0x816b}, /* SSI not active sync with vsync,
95 * hue (H byte) = 0, saturation/hue enable,
97 * was 0x0003, now 0x0000.
[all …]
/openbmc/linux/drivers/media/i2c/
H A Dar0521.c31 #define AR0521_MIN_X_ADDR_START 0u
32 #define AR0521_MIN_Y_ADDR_START 0u
46 #define AR0521_ANA_GAIN_MIN 0x00
47 #define AR0521_ANA_GAIN_MAX 0x3f
48 #define AR0521_ANA_GAIN_STEP 0x01
49 #define AR0521_ANA_GAIN_DEFAULT 0x00
52 #define AR0521_REG_VT_PIX_CLK_DIV 0x0300
53 #define AR0521_REG_FRAME_LENGTH_LINES 0x0340
55 #define AR0521_REG_CHIP_ID 0x3000
56 #define AR0521_REG_COARSE_INTEGRATION_TIME 0x3012
[all …]
/openbmc/linux/drivers/clk/qcom/
H A Ddispcc-sm8550.c52 #define DISP_CC_MISC_CMD 0xF000
75 { 249600000, 2000000000, 0 },
79 .l = 0xd,
80 .alpha = 0x6492,
81 .config_ctl_val = 0x20485699,
82 .config_ctl_hi_val = 0x00182261,
83 .config_ctl_hi1_val = 0x82aa299c,
84 .test_ctl_val = 0x00000000,
85 .test_ctl_hi_val = 0x00000003,
86 .test_ctl_hi1_val = 0x00009000,
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dreg.h22 #define AR_CR 0x0008
23 #define AR_CR_RXE(_ah) (AR_SREV_9300_20_OR_LATER(_ah) ? 0x0000000c : 0x00000004)
24 #define AR_CR_RXD 0x00000020
25 #define AR_CR_SWI 0x00000040
27 #define AR_RXDP 0x000C
29 #define AR_CFG 0x0014
30 #define AR_CFG_SWTD 0x00000001
31 #define AR_CFG_SWTB 0x00000002
32 #define AR_CFG_SWRD 0x00000004
33 #define AR_CFG_SWRB 0x00000008
[all …]
/openbmc/linux/include/linux/
H A Dpci_ids.h15 #define PCI_CLASS_NOT_DEFINED 0x0000
16 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
18 #define PCI_BASE_CLASS_STORAGE 0x01
19 #define PCI_CLASS_STORAGE_SCSI 0x0100
20 #define PCI_CLASS_STORAGE_IDE 0x0101
21 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
22 #define PCI_CLASS_STORAGE_IPI 0x0103
23 #define PCI_CLASS_STORAGE_RAID 0x0104
24 #define PCI_CLASS_STORAGE_SATA 0x0106
25 #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
[all …]
/openbmc/u-boot/include/
H A Dpci_ids.h12 #define PCI_CLASS_NOT_DEFINED 0x0000
13 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
15 #define PCI_BASE_CLASS_STORAGE 0x01
16 #define PCI_CLASS_STORAGE_SCSI 0x0100
17 #define PCI_CLASS_STORAGE_IDE 0x0101
18 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
19 #define PCI_CLASS_STORAGE_IPI 0x0103
20 #define PCI_CLASS_STORAGE_RAID 0x0104
21 #define PCI_CLASS_STORAGE_SATA 0x0106
22 #define PCI_CLASS_STORAGE_SATA_AHCI 0x010601
[all …]
/openbmc/linux/drivers/net/usb/
H A Dqmi_wwan.c59 QMI_WWAN_FLAG_RAWIP = 1 << 0,
65 QMI_WWAN_QUIRK_DTR = 1 << 0, /* needs "set DTR" request */
89 return 0; in qmimux_open()
95 return 0; in qmimux_stop()
106 hdr->pad = 0; in qmimux_start_xmit()
131 dev->hard_header_len = 0; in qmimux_setup()
132 dev->addr_len = 0; in qmimux_setup()
164 unsigned int len, offset = 0, pad_len, pkt_len; in qmimux_rx_fixup()
176 return 0; in qmimux_rx_fixup()
179 if (hdr->pad & 0x80) in qmimux_rx_fixup()
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_rfk.c24 static const u32 _tssi_de_cck_long[RF_PATH_NUM_8852C] = {0x5858, 0x7858};
25 static const u32 _tssi_de_cck_short[RF_PATH_NUM_8852C] = {0x5860, 0x7860};
26 static const u32 _tssi_de_mcs_20m[RF_PATH_NUM_8852C] = {0x5838, 0x7838};
27 static const u32 _tssi_de_mcs_40m[RF_PATH_NUM_8852C] = {0x5840, 0x7840};
28 static const u32 _tssi_de_mcs_80m[RF_PATH_NUM_8852C] = {0x5848, 0x7848};
29 static const u32 _tssi_de_mcs_80m_80m[RF_PATH_NUM_8852C] = {0x5850, 0x7850};
30 static const u32 _tssi_de_mcs_5m[RF_PATH_NUM_8852C] = {0x5828, 0x7828};
31 static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852C] = {0x5830, 0x7830};
34 0x8120, 0xc0d4, 0xc0d8, 0xc0e8, 0x8220, 0xc1d4, 0xc1d8, 0xc1e8
38 0xdf, 0x5f, 0x8f, 0x97, 0xa3, 0x5, 0x10005
[all …]
/openbmc/linux/sound/pci/
H A Dvia82xx.c52 #if 0
64 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
91 MODULE_PARM_DESC(dxs_support, "Support for DXS channels (0 = auto, 1 = enable, 2 = disable, 3 = 48k…
93 MODULE_PARM_DESC(dxs_init_volume, "initial DXS volume (0-31)");
103 #define VIA_REV_686_A 0x10
104 #define VIA_REV_686_B 0x11
105 #define VIA_REV_686_C 0x12
106 #define VIA_REV_686_D 0x13
107 #define VIA_REV_686_E 0x14
108 #define VIA_REV_686_H 0x20
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath5k/
H A Dreg.h46 #define AR5K_NOQCU_TXDP0 0x0000 /* Queue 0 - data */
47 #define AR5K_NOQCU_TXDP1 0x0004 /* Queue 1 - beacons */
52 #define AR5K_CR 0x0008 /* Register Address */
53 #define AR5K_CR_TXE0 0x00000001 /* TX Enable for queue 0 on 5210 */
54 #define AR5K_CR_TXE1 0x00000002 /* TX Enable for queue 1 on 5210 */
55 #define AR5K_CR_RXE 0x00000004 /* RX Enable */
56 #define AR5K_CR_TXD0 0x00000008 /* TX Disable for queue 0 on 5210 */
57 #define AR5K_CR_TXD1 0x00000010 /* TX Disable for queue 1 on 5210 */
58 #define AR5K_CR_RXD 0x00000020 /* RX Disable */
59 #define AR5K_CR_SWI 0x00000040 /* Software Interrupt */
[all …]

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