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/openbmc/u-boot/include/configs/
H A Dmx53cx9020.h33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
41 #define CONFIG_FEC_MXC_PHYADDR 0x1F
47 #define CONFIG_MXC_USB_FLAGS 0
54 #define CONFIG_LOADADDR 0x70010000 /* loadaddr env var */
57 "fdt_addr_r=0x71ff0000\0" \
58 "pxefile_addr_r=0x73000000\0" \
59 "ramdisk_addr_r=0x72000000\0" \
60 "console=ttymxc1,115200\0" \
61 "uenv=/boot/uEnv.txt\0" \
62 "optargs=\0" \
[all …]
H A Dmx53smd.h36 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44 #define CONFIG_FEC_MXC_PHYADDR 0x1F
53 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
56 "script=boot.scr\0" \
57 "uimage=uImage\0" \
58 "mmcdev=0\0" \
59 "mmcpart=2\0" \
60 "mmcroot=/dev/mmcblk0p3 rw\0" \
61 "mmcrootfstype=ext3 rootwait\0" \
64 "rootfstype=${mmcrootfstype}\0" \
[all …]
H A Dmx53evk.h44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
51 #define CONFIG_FEC_MXC_PHYADDR 0x1F
60 #define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
63 "script=boot.scr\0" \
64 "uimage=uImage\0" \
65 "mmcdev=0\0" \
66 "mmcpart=2\0" \
67 "mmcroot=/dev/mmcblk0p3 rw\0" \
68 "mmcrootfstype=ext3 rootwait\0" \
71 "rootfstype=${mmcrootfstype}\0" \
[all …]
H A Dmx53ard.h44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
57 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
60 "script=boot.scr\0" \
61 "uimage=zImage\0" \
62 "console=ttymxc0\0" \
63 "fdt_high=0xffffffff\0" \
64 "initrd_high=0xffffffff\0" \
65 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
66 "fdt_addr=0x78000000\0" \
67 "boot_fdt=try\0" \
[all …]
H A Dmx53loco.h31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
38 #define CONFIG_FEC_MXC_PHYADDR 0x1F
44 #define CONFIG_MXC_USB_FLAGS 0
59 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
60 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
70 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
73 "script=boot.scr\0" \
74 "image=zImage\0" \
75 "fdt_addr=0x71000000\0" \
76 "boot_fdt=try\0" \
[all …]
H A Dmx53ppd.h34 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
41 #define CONFIG_FEC_MXC_PHYADDR 0x1F
51 #define CONFIG_MXC_USB_FLAGS 0
54 #define CONFIG_SYS_I2C_RTC_ADDR 0x30
69 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48
70 #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8
80 #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */
83 "nfsserver=192.168.252.95\0" \
84 "gatewayip=192.168.252.95\0" \
85 "netmask=255.255.255.0\0" \
[all …]
/openbmc/linux/arch/sparc/include/asm/
H A Dfbio.h10 #define CG6_FBC 0x70000000
11 #define CG6_TEC 0x70001000
12 #define CG6_BTREGS 0x70002000
13 #define CG6_FHC 0x70004000
14 #define CG6_THC 0x70005000
15 #define CG6_ROM 0x70006000
16 #define CG6_RAM 0x70016000
17 #define CG6_DHC 0x80000000
19 #define CG3_MMAP_OFFSET 0x4000000
22 #define TCX_RAM8BIT 0x00000000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dfsl-imx-cspi.yaml81 Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst).
82 enum: [0, 1, 2]
99 #size-cells = <0>;
101 reg = <0x70010000 0x4000>;
/openbmc/linux/arch/m68k/include/asm/
H A Dfbio.h13 #define FBTYPE_SUN1BW 0 /* mono */
58 #define FBIOGTYPE _IOR('F', 0, struct fbtype)
61 int index; /* first element (0 origin) */
124 #define FB_WID_SHARED_8 0
196 #define FB_CLUT_WAIT 0x00000001 /* Not yet implemented */
225 #define CG6_FBC 0x70000000
226 #define CG6_TEC 0x70001000
227 #define CG6_BTREGS 0x70002000
228 #define CG6_FHC 0x70004000
229 #define CG6_THC 0x70005000
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51.dtsi46 reg = <0xe0000000 0x4000>;
52 #clock-cells = <0>;
58 #clock-cells = <0>;
59 clock-frequency = <0>;
64 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #clock-cells = <0>;
77 #size-cells = <0>;
78 cpu: cpu@0 {
81 reg = <0>;
[all …]
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-insn-defs.c.inc12 OPC_MOVGR2SCR = 0x00000800,
13 OPC_MOVSCR2GR = 0x00000c00,
14 OPC_CLZ_W = 0x00001400,
15 OPC_CTZ_W = 0x00001c00,
16 OPC_CLZ_D = 0x00002400,
17 OPC_CTZ_D = 0x00002c00,
18 OPC_REVB_2H = 0x00003000,
19 OPC_REVB_2W = 0x00003800,
20 OPC_REVB_D = 0x00003c00,
21 OPC_SEXT_H = 0x00005800,
[all …]