| /openbmc/linux/Documentation/devicetree/bindings/display/sprd/ |
| H A D | sprd,sharkl3-dpu.yaml | 65 reg = <0x63000000 0x1000>;
|
| /openbmc/linux/Documentation/devicetree/bindings/ata/ |
| H A D | faraday,ftide010.yaml | 15 platform. The controller can do PIO modes 0 through 4, Multi-word DMA
16 (MWDM) modes 0 through 2 and Ultra DMA modes 0 through 6.
76 reg = <0x63000000 0x100>;
82 #size-cells = <0>;
83 ide-port@0 {
84 reg = <0>;
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| /openbmc/linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,sc7180-lpasscorecc.yaml | 86 reg = <0x63000000 0x28>;
99 reg = <0x62d00000 0x50000>, <0x62780000 0x30000>;
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| /openbmc/u-boot/include/configs/ |
| H A D | mx7ulp_evk.h | 19 #define CONFIG_CSF_SIZE 0x4000
24 #define CONFIG_SYS_BOOTM_LEN 0x1000000
35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
37 #define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
76 #define PHYS_SDRAM 0x60000000
81 #define CONFIG_LOADADDR 0x60800000
83 #define CONFIG_SYS_MEMTEST_END 0x9E000000
86 "script=boot.scr\0" \
87 "image=zImage\0" \
[all …]
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| /openbmc/qemu/hw/arm/ |
| H A D | realview.c | 35 #define SMP_BOOT_ADDR 0xe0000000
36 #define SMP_BOOTREG_ADDR 0x10000030
54 0x33b,
55 0x33b,
56 0x769,
57 0x76d
68 qdev_connect_gpio_out(splitter, 0, out1); in split_irq_from_named()
70 qdev_connect_gpio_out_named(src, outname, 0, in split_irq_from_named()
71 qdev_get_gpio_in(splitter, 0)); in split_irq_from_named()
93 int is_mpcore = 0; in realview_init()
[all …]
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| /openbmc/linux/arch/arm/boot/dts/gemini/ |
| H A D | gemini.dtsi | 23 pinctrl-0 = <&pflash_default_pins>;
31 reg = <0x40000000 0x1000>;
39 offset = <0x0c>;
41 mask = <0xC0000000>;
49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
159 reg = <0x41000000 0x1000>;
168 reg = <0x42000000 0x100>;
173 pinctrl-0 = <&uart_default_pins>;
179 reg = <0x43000000 0x1000>;
193 reg = <0x45000000 0x100>;
[all …]
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| /openbmc/linux/drivers/video/fbdev/via/ |
| H A D | accel.c | 19 gemode = readl(engine + VIA_REG_GEMODE) & 0xfffffcfc; in viafb_set_bpp()
35 return 0; in viafb_set_bpp()
44 u32 ge_cmd = 0, tmp, i; in hw_bitblt_1()
54 ge_cmd |= 0x00008000; in hw_bitblt_1()
59 ge_cmd |= 0x00004000; in hw_bitblt_1()
67 case 0x00: /* blackness */ in hw_bitblt_1()
68 case 0x5A: /* pattern inversion */ in hw_bitblt_1()
69 case 0xF0: /* pattern copy */ in hw_bitblt_1()
70 case 0xFF: /* whiteness */ in hw_bitblt_1()
84 if (src_x & (op == VIA_BITBLT_MONO ? 0xFFFF8000 : 0xFFFFF000) in hw_bitblt_1()
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/sprd/ |
| H A D | sc9860.dtsi | 17 #size-cells = <0>;
54 reg = <0x0 0x530000>;
62 reg = <0x0 0x530001>;
70 reg = <0x0 0x530002>;
78 reg = <0x0 0x530003>;
86 reg = <0x0 0x530100>;
94 reg = <0x0 0x530101>;
102 reg = <0x0 0x530102>;
110 reg = <0x0 0x530103>;
125 arm,psci-suspend-param = <0x00010002>;
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_srv.c | 72 #define DMUB_CW0_BASE (0x60000000)
73 #define DMUB_CW1_BASE (0x61000000)
74 #define DMUB_CW3_BASE (0x63000000)
75 #define DMUB_CW4_BASE (0x64000000)
76 #define DMUB_CW5_BASE (0x65000000)
77 #define DMUB_CW6_BASE (0x66000000)
79 #define DMUB_REGION5_BASE (0xA0000000)
98 for (pos = 0; pos < end; pos += sizeof(buf)) in dmub_flush_buffer_mem()
140 for (i = 0; i < 16; ++i) { in dmub_get_fw_meta_info()
322 dmub_memset(dmub, 0, sizeof(*dmub)); in dmub_srv_create()
[all …]
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| /openbmc/linux/crypto/ |
| H A D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
|
| /openbmc/linux/drivers/clk/sprd/ |
| H A D | sc9860-clk.c | 26 6, 1, 0);
28 13, 1, 0);
30 26, 1, 0);
32 104, 1, 0);
34 1, 1, 0);
36 1, 1, 0);
38 4, 1, 0);
40 25, 1, 0);
42 50, 1, 0);
44 10, 1, 0);
[all …]
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| /openbmc/linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7180.dtsi | 63 #clock-cells = <0>;
69 #clock-cells = <0>;
75 #size-cells = <0>;
77 cpu0: cpu@0 {
80 reg = <0x0 0x0>;
81 clocks = <&cpufreq_hw 0>;
92 qcom,freq-domain = <&cpufreq_hw 0>;
109 reg = <0x0 0x100>;
110 clocks = <&cpufreq_hw 0>;
121 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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| /openbmc/linux/drivers/net/wireless/realtek/rtw88/ |
| H A D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]
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