Searched +full:0 +full:x48000000 +full:- +full:0 +full:x49ffffff (Results 1 – 3 of 3) sorted by relevance
1 /* SPDX-License-Identifier: GPL-2.0 */12 * The mapping is set in mach-pxa/generic.c.14 #define UNCACHED_PHYS_0 0xfe00000015 #define UNCACHED_PHYS_0_SIZE 0x0010000020 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff[all …]
2 * linux/include/asm-arm/arch-pxa/hardware.h12 * Note: This file was taken from linux-2.4.19-rmk4-pxa114 * - 2003/01/20 implementation specifics activated21 #include <asm/mach-types.h>42 #define PCMCIA_IO_0_BASE 0xf600000043 #define PCMCIA_IO_1_BASE 0xf700000049 #define PCIO_BASE 053 * The mapping is set in mach-pxa/generic.c.55 #define UNCACHED_PHYS_0 0xff00000061 * 0x40000000 - 0x41ffffff <--> 0xf8000000 - 0xf9ffffff[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 The UniPhier System Bus is an external bus that connects on-board devices to11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and16 within each bank to the CPU-viewed address. The needed setup includes the21 - Masahiro Yamada <yamada.masahiro@socionext.com>25 const: socionext,uniphier-system-bus30 "#address-cells":[all …]