1*e6acc406SArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */ 2*e6acc406SArnd Bergmann /* 3*e6acc406SArnd Bergmann * Author: Nicolas Pitre 4*e6acc406SArnd Bergmann * Created: Jun 15, 2001 5*e6acc406SArnd Bergmann * Copyright: MontaVista Software Inc. 6*e6acc406SArnd Bergmann */ 7*e6acc406SArnd Bergmann #ifndef __ASM_MACH_PXA_REGS_H 8*e6acc406SArnd Bergmann #define __ASM_MACH_PXA_REGS_H 9*e6acc406SArnd Bergmann 10*e6acc406SArnd Bergmann /* 11*e6acc406SArnd Bergmann * Workarounds for at least 2 errata so far require this. 12*e6acc406SArnd Bergmann * The mapping is set in mach-pxa/generic.c. 13*e6acc406SArnd Bergmann */ 14*e6acc406SArnd Bergmann #define UNCACHED_PHYS_0 0xfe000000 15*e6acc406SArnd Bergmann #define UNCACHED_PHYS_0_SIZE 0x00100000 16*e6acc406SArnd Bergmann 17*e6acc406SArnd Bergmann /* 18*e6acc406SArnd Bergmann * Intel PXA2xx internal register mapping: 19*e6acc406SArnd Bergmann * 20*e6acc406SArnd Bergmann * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff 21*e6acc406SArnd Bergmann * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff 22*e6acc406SArnd Bergmann * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff 23*e6acc406SArnd Bergmann * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff 24*e6acc406SArnd Bergmann * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff 25*e6acc406SArnd Bergmann * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff 26*e6acc406SArnd Bergmann * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff 27*e6acc406SArnd Bergmann * 28*e6acc406SArnd Bergmann * Note that not all PXA2xx chips implement all those addresses, and the 29*e6acc406SArnd Bergmann * kernel only maps the minimum needed range of this mapping. 30*e6acc406SArnd Bergmann */ 31*e6acc406SArnd Bergmann #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1)) 32*e6acc406SArnd Bergmann #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1)) 33*e6acc406SArnd Bergmann 34*e6acc406SArnd Bergmann #ifndef __ASSEMBLY__ 35*e6acc406SArnd Bergmann # define __REG(x) (*((volatile u32 __iomem *)io_p2v(x))) 36*e6acc406SArnd Bergmann 37*e6acc406SArnd Bergmann /* With indexed regs we don't want to feed the index through io_p2v() 38*e6acc406SArnd Bergmann especially if it is a variable, otherwise horrible code will result. */ 39*e6acc406SArnd Bergmann # define __REG2(x,y) \ 40*e6acc406SArnd Bergmann (*(volatile u32 __iomem*)((u32)&__REG(x) + (y))) 41*e6acc406SArnd Bergmann 42*e6acc406SArnd Bergmann # define __PREG(x) (io_v2p((u32)&(x))) 43*e6acc406SArnd Bergmann 44*e6acc406SArnd Bergmann #else 45*e6acc406SArnd Bergmann 46*e6acc406SArnd Bergmann # define __REG(x) io_p2v(x) 47*e6acc406SArnd Bergmann # define __PREG(x) io_v2p(x) 48*e6acc406SArnd Bergmann 49*e6acc406SArnd Bergmann #endif 50*e6acc406SArnd Bergmann 51*e6acc406SArnd Bergmann 52*e6acc406SArnd Bergmann #endif 53