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Searched +full:0 +full:x40e00000 (Results 1 – 14 of 14) sorted by relevance

/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c44 { "IBMR", 0x40301680, 0, 0xffffffff, 'x', "I2C Bus Monitor Register" },
45 { "IBMR_SDAS", 0x40301680, 0, 0x00000001, 'x', "SDA Status" },
46 { "IBMR_SCLS", 0x40301680, 1, 0x00000001, 'x', "SDA Status" },
48 { "IDBR", 0x40301688, 0, 0xffffffff, 'x', "I2C Data Buffer Register" },
49 { "IDBR_IDB", 0x40301688, 0, 0x000000ff, 'x', "I2C Data Buffer" },
51 { "ICR", 0x40301690, 0, 0xffffffff, 'x', "I2C Control Register" },
52 { "ICR_START", 0x40301690, 0, 1, 'x', " start bit " },
53 { "ICR_STOP", 0x40301690, 1, 1, 'x', " stop bit " },
54 { "ICR_ACKNAK",0x40301690, 2, 1, 'x', " send ACK(0) or NAK(1)" },
55 { "ICR_TB", 0x40301690, 3, 1, 'x', " transfer byte bit " },
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa2xx.dtsi64 reg = <0x40d00000 0xd0>;
69 #address-cells = <0x1>;
70 #size-cells = <0x1>;
71 reg = <0x40e00000 0x10000>;
73 #gpio-cells = <0x2>;
77 #interrupt-cells = <0x2>;
81 reg = <0x40e00000 0x4>;
85 reg = <0x40e00004 0x4>;
89 reg = <0x40e00008 0x4>;
92 reg = <0x40e0000c 0x4>;
[all …]
H A Dpxa3xx.dtsi6 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
7 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
8 (gpio <= 98) ? (0x0400 + 4 * (gpio - 27)) : \
9 (gpio <= 127) ? (0x0600 + 4 * (gpio - 99)) : \
10 0)
12 ((gpio <= 1) ? (0x674 + 4 * gpio) : \
13 (gpio <= 6) ? (0x2dc + 4 * gpio) : \
14 0)
17 ((gpio <= 2) ? (0x00b4 + 4 * gpio) : \
18 (gpio <= 26) ? (0x027c + 4 * (gpio - 3)) : \
[all …]
/openbmc/linux/arch/arm/mach-pxa/
H A Dmfp-pxa2xx.c27 #define PGSR(x) __REG2(0x40F00020, (x) << 2)
28 #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
29 #define GAFR_L(x) __GAFR(0, x)
32 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33 #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35 #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
36 #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
46 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
58 int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */ in __mfp_config_gpio()
[all …]
H A Ddevices.c51 [0] = {
52 .start = 0x41100000,
53 .end = 0x41100fff,
63 static u64 pxamci_dmamask = 0xffffffffUL;
67 .id = 0,
70 .coherent_dma_mask = 0xffffffff,
86 [0] = {
87 .start = 0x40600000,
88 .end = 0x4060ffff,
98 static u64 udc_dma_mask = ~(u32)0;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dxlnx,emaclite.yaml56 reg = <0x40e00000 0x10000>;
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dmrvl-gpio.yaml51 pattern: '^gpio@[0-9a-f]+$'
97 '^gpio@[0-9a-f]*$':
129 reg = <0x40e00000 0x10000>;
144 reg = <0xd4019000 0x1000>;
156 reg = <0xd4019000 0x4>;
160 reg = <0xd4019004 0x4>;
164 reg = <0xd4019008 0x4>;
168 reg = <0xd4019100 0x4>;
/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_lsc.S18 lsi f0, a2, 0
24 movi a3, 0x3f800000
27 movi a3, 0x40000000
30 movi a3, 0x40400000
41 movi a3, 0x40800000
43 movi a3, 0x40a00000
45 movi a3, 0x40c00000
52 ssi f3, a2, 0
58 movi a3, 0x40800000
61 movi a3, 0x40a00000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml235 reg = <0x98000000 0x800000>;
244 ti,bootreg = <&scm_conf 0x304 0>;
250 clocks = <&tesla_clkctrl OMAP4_DSP_CLKCTRL 0>;
251 resets = <&prm_tesla 0>, <&prm_tesla 1>;
268 reg = <0 0x95800000 0 0x3800000>;
280 reg = <0x55020000 0x10000>;
287 clocks = <&ipu_clkctrl OMAP5_MMU_IPU_CLKCTRL 0>;
305 reg = <0x0 0x99000000 0x0 0x4000000>;
317 reg = <0x40800000 0x48000>,
318 <0x40e00000 0x8000>,
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Ddra7.dtsi61 reg = <0x0 0x48211000 0x0 0x1000>,
62 <0x0 0x48212000 0x0 0x2000>,
63 <0x0 0x48214000 0x0 0x2000>,
64 <0x0 0x48216000 0x0 0x2000>;
73 reg = <0x0 0x48281000 0x0 0x1000>;
79 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0>;
109 opp-supported-hw = <0xFF 0x01>;
119 opp-supported-hw = <0xFF 0x02>;
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h37 #define PXA_CS0_PHYS 0x00000000 /* for both small and large same start */
38 #define PXA_CS1_PHYS 0x04000000 /* Small partition start address (64MB) */
39 #define PXA_CS1_LPHYS 0x30000000 /* Large partition start address (256MB) */
40 #define PXA_CS2_PHYS 0x10000000 /* (64MB) */
41 #define PXA_CS3_PHYS 0x14000000 /* (64MB) */
42 #define PXA_PCMCIA_PHYS 0x20000000 /* (256MB) */
44 #define PXA_CS0_PHYS 0x00000000
45 #define PXA_CS1_PHYS 0x04000000
46 #define PXA_CS2_PHYS 0x08000000
47 #define PXA_CS3_PHYS 0x0C000000
[all …]
/openbmc/linux/sound/pci/mixart/
H A Dmixart_mixer.c24 0xc2c00000, /* [000] -96.0 dB */
25 0xc2bf0000, /* [001] -95.5 dB */
26 0xc2be0000, /* [002] -95.0 dB */
27 0xc2bd0000, /* [003] -94.5 dB */
28 0xc2bc0000, /* [004] -94.0 dB */
29 0xc2bb0000, /* [005] -93.5 dB */
30 0xc2ba0000, /* [006] -93.0 dB */
31 0xc2b90000, /* [007] -92.5 dB */
32 0xc2b80000, /* [008] -92.0 dB */
33 0xc2b70000, /* [009] -91.5 dB */
[all …]
/openbmc/linux/sound/pci/hda/
H A Dpatch_ca0132.c37 #define FLOAT_ZERO 0x00000000
38 #define FLOAT_ONE 0x3f800000
39 #define FLOAT_TWO 0x40000000
40 #define FLOAT_THREE 0x40400000
41 #define FLOAT_FIVE 0x40a00000
42 #define FLOAT_SIX 0x40c00000
43 #define FLOAT_EIGHT 0x41000000
44 #define FLOAT_MINUS_5 0xc0a00000
46 #define UNSOL_TAG_DSP 0x16
55 #define MASTERCONTROL 0x80
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]