1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
27facc2f9Seric miao /*
37facc2f9Seric miao * linux/arch/arm/mach-pxa/mfp-pxa2xx.c
47facc2f9Seric miao *
57facc2f9Seric miao * PXA2xx pin mux configuration support
67facc2f9Seric miao *
77facc2f9Seric miao * The GPIOs on PXA2xx can be configured as one of many alternate
87facc2f9Seric miao * functions, this is by concept samilar to the MFP configuration
97facc2f9Seric miao * on PXA3xx, what's more important, the low power pin state and
107facc2f9Seric miao * wakeup detection are also supported by the same framework.
117facc2f9Seric miao */
122f8163baSRussell King #include <linux/gpio.h>
13157d2644SHaojian Zhuang #include <linux/gpio-pxa.h>
147facc2f9Seric miao #include <linux/module.h>
157facc2f9Seric miao #include <linux/kernel.h>
167facc2f9Seric miao #include <linux/init.h>
1723019a73SRob Herring #include <linux/io.h>
182eaa03b5SRafael J. Wysocki #include <linux/syscore_ops.h>
1908d3df8cSArnd Bergmann #include <linux/soc/pxa/cpu.h>
207facc2f9Seric miao
21e6acc406SArnd Bergmann #include "pxa2xx-regs.h"
224c25c5d2SArnd Bergmann #include "mfp-pxa2xx.h"
23*a9ae9c52SArnd Bergmann #include "mfp-pxa27x.h"
247facc2f9Seric miao
257facc2f9Seric miao #include "generic.h"
267facc2f9Seric miao
275a3d9651SEric Miao #define PGSR(x) __REG2(0x40F00020, (x) << 2)
285a3d9651SEric Miao #define __GAFR(u, x) __REG2((u) ? 0x40E00058 : 0x40E00054, (x) << 3)
295a3d9651SEric Miao #define GAFR_L(x) __GAFR(0, x)
305a3d9651SEric Miao #define GAFR_U(x) __GAFR(1, x)
317facc2f9Seric miao
32157d2644SHaojian Zhuang #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33157d2644SHaojian Zhuang #define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34157d2644SHaojian Zhuang #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35ef7c7c69SIgor Grinberg #define GPSR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x18)
36ef7c7c69SIgor Grinberg #define GPCR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x24)
37157d2644SHaojian Zhuang
387facc2f9Seric miao #define PWER_WE35 (1 << 24)
397facc2f9Seric miao
40c0a596d6Seric miao struct gpio_desc {
417facc2f9Seric miao unsigned valid : 1;
427facc2f9Seric miao unsigned can_wakeup : 1;
437facc2f9Seric miao unsigned keypad_gpio : 1;
44067455aaSEric Miao unsigned dir_inverted : 1;
457facc2f9Seric miao unsigned int mask; /* bit mask in PWER or PKWR */
4699687114SRobert Jarzmik unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */
477facc2f9Seric miao unsigned long config;
48c0a596d6Seric miao };
497facc2f9Seric miao
50c0a596d6Seric miao static struct gpio_desc gpio_desc[MFP_PIN_GPIO127 + 1];
51c0a596d6Seric miao
525a3d9651SEric Miao static unsigned long gpdr_lpm[4];
53566b450cSEric Miao
__mfp_config_gpio(unsigned gpio,unsigned long c)54c0a596d6Seric miao static int __mfp_config_gpio(unsigned gpio, unsigned long c)
557facc2f9Seric miao {
567facc2f9Seric miao unsigned long gafr, mask = GPIO_bit(gpio);
575a3d9651SEric Miao int bank = gpio_to_bank(gpio);
585a3d9651SEric Miao int uorl = !!(gpio & 0x10); /* GAFRx_U or GAFRx_L ? */
595a3d9651SEric Miao int shft = (gpio & 0xf) << 1;
605a3d9651SEric Miao int fn = MFP_AF(c);
61067455aaSEric Miao int is_out = (c & MFP_DIR_OUT) ? 1 : 0;
627facc2f9Seric miao
637facc2f9Seric miao if (fn > 3)
647facc2f9Seric miao return -EINVAL;
657facc2f9Seric miao
665a3d9651SEric Miao /* alternate function and direction at run-time */
675a3d9651SEric Miao gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank);
685a3d9651SEric Miao gafr = (gafr & ~(0x3 << shft)) | (fn << shft);
697facc2f9Seric miao
705a3d9651SEric Miao if (uorl == 0)
715a3d9651SEric Miao GAFR_L(bank) = gafr;
725a3d9651SEric Miao else
735a3d9651SEric Miao GAFR_U(bank) = gafr;
745a3d9651SEric Miao
75067455aaSEric Miao if (is_out ^ gpio_desc[gpio].dir_inverted)
767facc2f9Seric miao GPDR(gpio) |= mask;
777facc2f9Seric miao else
787facc2f9Seric miao GPDR(gpio) &= ~mask;
797facc2f9Seric miao
805a3d9651SEric Miao /* alternate function and direction at low power mode */
815a3d9651SEric Miao switch (c & MFP_LPM_STATE_MASK) {
825a3d9651SEric Miao case MFP_LPM_DRIVE_HIGH:
835a3d9651SEric Miao PGSR(bank) |= mask;
84067455aaSEric Miao is_out = 1;
855a3d9651SEric Miao break;
865a3d9651SEric Miao case MFP_LPM_DRIVE_LOW:
875a3d9651SEric Miao PGSR(bank) &= ~mask;
88067455aaSEric Miao is_out = 1;
895a3d9651SEric Miao break;
901fe8c2bcSEric Miao case MFP_LPM_INPUT:
915a3d9651SEric Miao case MFP_LPM_DEFAULT:
925a3d9651SEric Miao break;
935a3d9651SEric Miao default:
945a3d9651SEric Miao /* warning and fall through, treat as MFP_LPM_DEFAULT */
957b472ac7SJoe Perches pr_warn("%s: GPIO%d: unsupported low power mode\n",
965a3d9651SEric Miao __func__, gpio);
975a3d9651SEric Miao break;
985a3d9651SEric Miao }
995a3d9651SEric Miao
100067455aaSEric Miao if (is_out ^ gpio_desc[gpio].dir_inverted)
1015a3d9651SEric Miao gpdr_lpm[bank] |= mask;
1025a3d9651SEric Miao else
1035a3d9651SEric Miao gpdr_lpm[bank] &= ~mask;
1047facc2f9Seric miao
105c0a596d6Seric miao /* give early warning if MFP_LPM_CAN_WAKEUP is set on the
106c0a596d6Seric miao * configurations of those pins not able to wakeup
107c0a596d6Seric miao */
108c0a596d6Seric miao if ((c & MFP_LPM_CAN_WAKEUP) && !gpio_desc[gpio].can_wakeup) {
1097b472ac7SJoe Perches pr_warn("%s: GPIO%d unable to wakeup\n", __func__, gpio);
1107facc2f9Seric miao return -EINVAL;
1117facc2f9Seric miao }
1127facc2f9Seric miao
113067455aaSEric Miao if ((c & MFP_LPM_CAN_WAKEUP) && is_out) {
1147b472ac7SJoe Perches pr_warn("%s: output GPIO%d unable to wakeup\n", __func__, gpio);
115c0a596d6Seric miao return -EINVAL;
1167facc2f9Seric miao }
1177facc2f9Seric miao
1187facc2f9Seric miao return 0;
1197facc2f9Seric miao }
1207facc2f9Seric miao
__mfp_validate(int mfp)1210fedb0caSEric Miao static inline int __mfp_validate(int mfp)
1220fedb0caSEric Miao {
1230fedb0caSEric Miao int gpio = mfp_to_gpio(mfp);
1240fedb0caSEric Miao
1250fedb0caSEric Miao if ((mfp > MFP_PIN_GPIO127) || !gpio_desc[gpio].valid) {
1267b472ac7SJoe Perches pr_warn("%s: GPIO%d is invalid pin\n", __func__, gpio);
1270fedb0caSEric Miao return -1;
1280fedb0caSEric Miao }
1290fedb0caSEric Miao
1300fedb0caSEric Miao return gpio;
1310fedb0caSEric Miao }
1320fedb0caSEric Miao
pxa2xx_mfp_config(unsigned long * mfp_cfgs,int num)1337facc2f9Seric miao void pxa2xx_mfp_config(unsigned long *mfp_cfgs, int num)
1347facc2f9Seric miao {
1357facc2f9Seric miao unsigned long flags;
1367facc2f9Seric miao unsigned long *c;
1377facc2f9Seric miao int i, gpio;
1387facc2f9Seric miao
1397facc2f9Seric miao for (i = 0, c = mfp_cfgs; i < num; i++, c++) {
1407facc2f9Seric miao
1410fedb0caSEric Miao gpio = __mfp_validate(MFP_PIN(*c));
1420fedb0caSEric Miao if (gpio < 0)
1437facc2f9Seric miao continue;
1447facc2f9Seric miao
1457facc2f9Seric miao local_irq_save(flags);
1467facc2f9Seric miao
1477facc2f9Seric miao gpio_desc[gpio].config = *c;
1487facc2f9Seric miao __mfp_config_gpio(gpio, *c);
1497facc2f9Seric miao
1507facc2f9Seric miao local_irq_restore(flags);
1517facc2f9Seric miao }
1527facc2f9Seric miao }
1537facc2f9Seric miao
pxa2xx_mfp_set_lpm(int mfp,unsigned long lpm)154566b450cSEric Miao void pxa2xx_mfp_set_lpm(int mfp, unsigned long lpm)
155566b450cSEric Miao {
1565a3d9651SEric Miao unsigned long flags, c;
157566b450cSEric Miao int gpio;
158566b450cSEric Miao
159566b450cSEric Miao gpio = __mfp_validate(mfp);
160566b450cSEric Miao if (gpio < 0)
161566b450cSEric Miao return;
162566b450cSEric Miao
163566b450cSEric Miao local_irq_save(flags);
1645a3d9651SEric Miao
1655a3d9651SEric Miao c = gpio_desc[gpio].config;
1665a3d9651SEric Miao c = (c & ~MFP_LPM_STATE_MASK) | lpm;
1675a3d9651SEric Miao __mfp_config_gpio(gpio, c);
1685a3d9651SEric Miao
169566b450cSEric Miao local_irq_restore(flags);
170566b450cSEric Miao }
171566b450cSEric Miao
gpio_set_wake(unsigned int gpio,unsigned int on)172c0a596d6Seric miao int gpio_set_wake(unsigned int gpio, unsigned int on)
173c0a596d6Seric miao {
174c0a596d6Seric miao struct gpio_desc *d;
17599687114SRobert Jarzmik unsigned long c, mux_taken;
176c0a596d6Seric miao
177c0a596d6Seric miao if (gpio > mfp_to_gpio(MFP_PIN_GPIO127))
178c0a596d6Seric miao return -EINVAL;
179c0a596d6Seric miao
180c0a596d6Seric miao d = &gpio_desc[gpio];
181c0a596d6Seric miao c = d->config;
182c0a596d6Seric miao
183c0a596d6Seric miao if (!d->valid)
184c0a596d6Seric miao return -EINVAL;
185c0a596d6Seric miao
186c09f431cSEric Miao /* Allow keypad GPIOs to wakeup system when
187c09f431cSEric Miao * configured as generic GPIOs.
188c09f431cSEric Miao */
189c09f431cSEric Miao if (d->keypad_gpio && (MFP_AF(d->config) == 0) &&
190c09f431cSEric Miao (d->config & MFP_LPM_CAN_WAKEUP)) {
191c09f431cSEric Miao if (on)
192c09f431cSEric Miao PKWR |= d->mask;
193c09f431cSEric Miao else
194c09f431cSEric Miao PKWR &= ~d->mask;
195c09f431cSEric Miao return 0;
196c09f431cSEric Miao }
197c0a596d6Seric miao
19899687114SRobert Jarzmik mux_taken = (PWER & d->mux_mask) & (~d->mask);
19999687114SRobert Jarzmik if (on && mux_taken)
20099687114SRobert Jarzmik return -EBUSY;
20199687114SRobert Jarzmik
202c0a596d6Seric miao if (d->can_wakeup && (c & MFP_LPM_CAN_WAKEUP)) {
203c0a596d6Seric miao if (on) {
20499687114SRobert Jarzmik PWER = (PWER & ~d->mux_mask) | d->mask;
205c0a596d6Seric miao
206c0a596d6Seric miao if (c & MFP_LPM_EDGE_RISE)
207c0a596d6Seric miao PRER |= d->mask;
208c0a596d6Seric miao else
209c0a596d6Seric miao PRER &= ~d->mask;
210c0a596d6Seric miao
211c0a596d6Seric miao if (c & MFP_LPM_EDGE_FALL)
212c0a596d6Seric miao PFER |= d->mask;
213c0a596d6Seric miao else
214c0a596d6Seric miao PFER &= ~d->mask;
215c0a596d6Seric miao } else {
216c0a596d6Seric miao PWER &= ~d->mask;
217c0a596d6Seric miao PRER &= ~d->mask;
218c0a596d6Seric miao PFER &= ~d->mask;
219c0a596d6Seric miao }
220c0a596d6Seric miao }
221c0a596d6Seric miao return 0;
222c0a596d6Seric miao }
223c0a596d6Seric miao
2247facc2f9Seric miao #ifdef CONFIG_PXA25x
pxa25x_mfp_init(void)2255a3d9651SEric Miao static void __init pxa25x_mfp_init(void)
2267facc2f9Seric miao {
2277facc2f9Seric miao int i;
2287facc2f9Seric miao
229af829310SHaojian Zhuang /* running before pxa_gpio_probe() */
230af829310SHaojian Zhuang pxa_last_gpio = 84;
231ddd244ddSEric Miao for (i = 0; i <= pxa_last_gpio; i++)
2327facc2f9Seric miao gpio_desc[i].valid = 1;
2337facc2f9Seric miao
2347facc2f9Seric miao for (i = 0; i <= 15; i++) {
2357facc2f9Seric miao gpio_desc[i].can_wakeup = 1;
2367facc2f9Seric miao gpio_desc[i].mask = GPIO_bit(i);
2377facc2f9Seric miao }
238067455aaSEric Miao
239067455aaSEric Miao /* PXA26x has additional 4 GPIOs (86/87/88/89) which has the
240067455aaSEric Miao * direction bit inverted in GPDR2. See PXA26x DM 4.1.1.
241067455aaSEric Miao */
242067455aaSEric Miao for (i = 86; i <= pxa_last_gpio; i++)
243067455aaSEric Miao gpio_desc[i].dir_inverted = 1;
2447facc2f9Seric miao }
2455a3d9651SEric Miao #else
pxa25x_mfp_init(void)2465a3d9651SEric Miao static inline void pxa25x_mfp_init(void) {}
2477facc2f9Seric miao #endif /* CONFIG_PXA25x */
2487facc2f9Seric miao
2497facc2f9Seric miao #ifdef CONFIG_PXA27x
250c0a596d6Seric miao static int pxa27x_pkwr_gpio[] = {
2517facc2f9Seric miao 13, 16, 17, 34, 36, 37, 38, 39, 90, 91, 93, 94,
2527facc2f9Seric miao 95, 96, 97, 98, 99, 100, 101, 102
2537facc2f9Seric miao };
2547facc2f9Seric miao
keypad_set_wake(unsigned int on)255c0a596d6Seric miao int keypad_set_wake(unsigned int on)
256c0a596d6Seric miao {
257c0a596d6Seric miao unsigned int i, gpio, mask = 0;
258c09f431cSEric Miao struct gpio_desc *d;
259c0a596d6Seric miao
260c0a596d6Seric miao for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
261c0a596d6Seric miao
262c0a596d6Seric miao gpio = pxa27x_pkwr_gpio[i];
263c09f431cSEric Miao d = &gpio_desc[gpio];
264c0a596d6Seric miao
265c09f431cSEric Miao /* skip if configured as generic GPIO */
266c09f431cSEric Miao if (MFP_AF(d->config) == 0)
267c09f431cSEric Miao continue;
268c09f431cSEric Miao
269c09f431cSEric Miao if (d->config & MFP_LPM_CAN_WAKEUP)
270c0a596d6Seric miao mask |= gpio_desc[gpio].mask;
271c0a596d6Seric miao }
272c0a596d6Seric miao
273c09f431cSEric Miao if (on)
274c09f431cSEric Miao PKWR |= mask;
275c09f431cSEric Miao else
276c09f431cSEric Miao PKWR &= ~mask;
277c0a596d6Seric miao return 0;
278c0a596d6Seric miao }
279c0a596d6Seric miao
28099687114SRobert Jarzmik #define PWER_WEMUX2_GPIO38 (1 << 16)
28199687114SRobert Jarzmik #define PWER_WEMUX2_GPIO53 (2 << 16)
28299687114SRobert Jarzmik #define PWER_WEMUX2_GPIO40 (3 << 16)
28399687114SRobert Jarzmik #define PWER_WEMUX2_GPIO36 (4 << 16)
28499687114SRobert Jarzmik #define PWER_WEMUX2_MASK (7 << 16)
28599687114SRobert Jarzmik #define PWER_WEMUX3_GPIO31 (1 << 19)
28699687114SRobert Jarzmik #define PWER_WEMUX3_GPIO113 (2 << 19)
28799687114SRobert Jarzmik #define PWER_WEMUX3_MASK (3 << 19)
28899687114SRobert Jarzmik
28999687114SRobert Jarzmik #define INIT_GPIO_DESC_MUXED(mux, gpio) \
29099687114SRobert Jarzmik do { \
29199687114SRobert Jarzmik gpio_desc[(gpio)].can_wakeup = 1; \
29299687114SRobert Jarzmik gpio_desc[(gpio)].mask = PWER_ ## mux ## _GPIO ##gpio; \
29399687114SRobert Jarzmik gpio_desc[(gpio)].mux_mask = PWER_ ## mux ## _MASK; \
29499687114SRobert Jarzmik } while (0)
29599687114SRobert Jarzmik
pxa27x_mfp_init(void)2965a3d9651SEric Miao static void __init pxa27x_mfp_init(void)
2977facc2f9Seric miao {
2987facc2f9Seric miao int i, gpio;
2997facc2f9Seric miao
300af829310SHaojian Zhuang pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
301ddd244ddSEric Miao for (i = 0; i <= pxa_last_gpio; i++) {
3027facc2f9Seric miao /* skip GPIO2, 5, 6, 7, 8, they are not
3037facc2f9Seric miao * valid pins allow configuration
3047facc2f9Seric miao */
3055a3d9651SEric Miao if (i == 2 || i == 5 || i == 6 || i == 7 || i == 8)
3067facc2f9Seric miao continue;
3077facc2f9Seric miao
3087facc2f9Seric miao gpio_desc[i].valid = 1;
3097facc2f9Seric miao }
3107facc2f9Seric miao
3117facc2f9Seric miao /* Keypad GPIOs */
3127facc2f9Seric miao for (i = 0; i < ARRAY_SIZE(pxa27x_pkwr_gpio); i++) {
3137facc2f9Seric miao gpio = pxa27x_pkwr_gpio[i];
3147facc2f9Seric miao gpio_desc[gpio].can_wakeup = 1;
3157facc2f9Seric miao gpio_desc[gpio].keypad_gpio = 1;
3167facc2f9Seric miao gpio_desc[gpio].mask = 1 << i;
3177facc2f9Seric miao }
3187facc2f9Seric miao
3197facc2f9Seric miao /* Overwrite GPIO13 as a PWER wakeup source */
3207facc2f9Seric miao for (i = 0; i <= 15; i++) {
3217facc2f9Seric miao /* skip GPIO2, 5, 6, 7, 8 */
3227facc2f9Seric miao if (GPIO_bit(i) & 0x1e4)
3237facc2f9Seric miao continue;
3247facc2f9Seric miao
3257facc2f9Seric miao gpio_desc[i].can_wakeup = 1;
3267facc2f9Seric miao gpio_desc[i].mask = GPIO_bit(i);
3277facc2f9Seric miao }
3287facc2f9Seric miao
3297facc2f9Seric miao gpio_desc[35].can_wakeup = 1;
3307facc2f9Seric miao gpio_desc[35].mask = PWER_WE35;
3317facc2f9Seric miao
33299687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX3, 31);
33399687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX3, 113);
33499687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX2, 38);
33599687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX2, 53);
33699687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX2, 40);
33799687114SRobert Jarzmik INIT_GPIO_DESC_MUXED(WEMUX2, 36);
3385a3d9651SEric Miao }
3395a3d9651SEric Miao #else
pxa27x_mfp_init(void)3405a3d9651SEric Miao static inline void pxa27x_mfp_init(void) {}
3415a3d9651SEric Miao #endif /* CONFIG_PXA27x */
3425a3d9651SEric Miao
3435a3d9651SEric Miao #ifdef CONFIG_PM
3445a3d9651SEric Miao static unsigned long saved_gafr[2][4];
3455a3d9651SEric Miao static unsigned long saved_gpdr[4];
346ef7c7c69SIgor Grinberg static unsigned long saved_gplr[4];
347818bc814SDaniel Ribeiro static unsigned long saved_pgsr[4];
3485a3d9651SEric Miao
pxa2xx_mfp_suspend(void)3492eaa03b5SRafael J. Wysocki static int pxa2xx_mfp_suspend(void)
3505a3d9651SEric Miao {
3515a3d9651SEric Miao int i;
3525a3d9651SEric Miao
3531106143dSEric Miao /* set corresponding PGSR bit of those marked MFP_LPM_KEEP_OUTPUT */
3541106143dSEric Miao for (i = 0; i < pxa_last_gpio; i++) {
3551106143dSEric Miao if ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
3561106143dSEric Miao (GPDR(i) & GPIO_bit(i))) {
3571106143dSEric Miao if (GPLR(i) & GPIO_bit(i))
358beb0c9b0SPaul Parsons PGSR(gpio_to_bank(i)) |= GPIO_bit(i);
3591106143dSEric Miao else
360beb0c9b0SPaul Parsons PGSR(gpio_to_bank(i)) &= ~GPIO_bit(i);
3611106143dSEric Miao }
3621106143dSEric Miao }
3631106143dSEric Miao
364ddd244ddSEric Miao for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
3655a3d9651SEric Miao saved_gafr[0][i] = GAFR_L(i);
3665a3d9651SEric Miao saved_gafr[1][i] = GAFR_U(i);
3675a3d9651SEric Miao saved_gpdr[i] = GPDR(i * 32);
368ef7c7c69SIgor Grinberg saved_gplr[i] = GPLR(i * 32);
369818bc814SDaniel Ribeiro saved_pgsr[i] = PGSR(i);
370ef7c7c69SIgor Grinberg
371ef7c7c69SIgor Grinberg GPSR(i * 32) = PGSR(i);
372ef7c7c69SIgor Grinberg GPCR(i * 32) = ~PGSR(i);
3735a3d9651SEric Miao }
374a13b8787SIgor Grinberg
375a13b8787SIgor Grinberg /* set GPDR bits taking into account MFP_LPM_KEEP_OUTPUT */
376a13b8787SIgor Grinberg for (i = 0; i < pxa_last_gpio; i++) {
377a13b8787SIgor Grinberg if ((gpdr_lpm[gpio_to_bank(i)] & GPIO_bit(i)) ||
378a13b8787SIgor Grinberg ((gpio_desc[i].config & MFP_LPM_KEEP_OUTPUT) &&
379a13b8787SIgor Grinberg (saved_gpdr[gpio_to_bank(i)] & GPIO_bit(i))))
380a13b8787SIgor Grinberg GPDR(i) |= GPIO_bit(i);
381a13b8787SIgor Grinberg else
382a13b8787SIgor Grinberg GPDR(i) &= ~GPIO_bit(i);
383a13b8787SIgor Grinberg }
384a13b8787SIgor Grinberg
3857facc2f9Seric miao return 0;
3867facc2f9Seric miao }
3875a3d9651SEric Miao
pxa2xx_mfp_resume(void)3882eaa03b5SRafael J. Wysocki static void pxa2xx_mfp_resume(void)
3895a3d9651SEric Miao {
3905a3d9651SEric Miao int i;
3915a3d9651SEric Miao
392ddd244ddSEric Miao for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++) {
3935a3d9651SEric Miao GAFR_L(i) = saved_gafr[0][i];
3945a3d9651SEric Miao GAFR_U(i) = saved_gafr[1][i];
395ef7c7c69SIgor Grinberg GPSR(i * 32) = saved_gplr[i];
396ef7c7c69SIgor Grinberg GPCR(i * 32) = ~saved_gplr[i];
3975a3d9651SEric Miao GPDR(i * 32) = saved_gpdr[i];
398818bc814SDaniel Ribeiro PGSR(i) = saved_pgsr[i];
3995a3d9651SEric Miao }
4005a3d9651SEric Miao PSSR = PSSR_RDH | PSSR_PH;
4015a3d9651SEric Miao }
4025a3d9651SEric Miao #else
4035a3d9651SEric Miao #define pxa2xx_mfp_suspend NULL
4045a3d9651SEric Miao #define pxa2xx_mfp_resume NULL
4055a3d9651SEric Miao #endif
4065a3d9651SEric Miao
4072eaa03b5SRafael J. Wysocki struct syscore_ops pxa2xx_mfp_syscore_ops = {
4085a3d9651SEric Miao .suspend = pxa2xx_mfp_suspend,
4095a3d9651SEric Miao .resume = pxa2xx_mfp_resume,
4105a3d9651SEric Miao };
4115a3d9651SEric Miao
pxa2xx_mfp_init(void)4125a3d9651SEric Miao static int __init pxa2xx_mfp_init(void)
4135a3d9651SEric Miao {
4145a3d9651SEric Miao int i;
4155a3d9651SEric Miao
416e7f3c600SEric Miao if (!cpu_is_pxa2xx())
417e7f3c600SEric Miao return 0;
418e7f3c600SEric Miao
4195a3d9651SEric Miao if (cpu_is_pxa25x())
4205a3d9651SEric Miao pxa25x_mfp_init();
4215a3d9651SEric Miao
4225a3d9651SEric Miao if (cpu_is_pxa27x())
4235a3d9651SEric Miao pxa27x_mfp_init();
4245a3d9651SEric Miao
425866bd435STimothy Clacy /* clear RDH bit to enable GPIO receivers after reset/sleep exit */
426866bd435STimothy Clacy PSSR = PSSR_RDH;
427866bd435STimothy Clacy
4285a3d9651SEric Miao /* initialize gafr_run[], pgsr_lpm[] from existing values */
429ddd244ddSEric Miao for (i = 0; i <= gpio_to_bank(pxa_last_gpio); i++)
4305a3d9651SEric Miao gpdr_lpm[i] = GPDR(i * 32);
4315a3d9651SEric Miao
4322eaa03b5SRafael J. Wysocki return 0;
4335a3d9651SEric Miao }
4345a3d9651SEric Miao postcore_initcall(pxa2xx_mfp_init);
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