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/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-mini-nand.dts27 memory@0 {
29 reg = <0x0 0x0 0x40000000>;
47 reg = <0x0 0xff100000 0x1000>;
54 partition@0 { /* for testing purpose */
56 reg = <0x0 0x0 0x400000>;
60 reg = <0x0 0x400000 0x1400000>;
64 reg = <0x0 0x1800000 0x400000>;
68 reg = <0x0 0x1C00000 0x1400000>;
72 reg = <0x0 0x3000000 0x400000>;
76 reg = <0x0 0x3400000 0xFCC00000>;
[all …]
H A Dzynqmp-zc1751-xm017-dc3.dts37 memory@0 {
39 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
79 phy0: phy@0 { /* VSC8211 */
80 reg = <0>;
95 reg = <0x20>;
103 reg = <0x68>;
119 partition@0 { /* for testing purpose */
121 reg = <0x0 0x0 0x400000>;
125 reg = <0x0 0x400000 0x1400000>;
129 reg = <0x0 0x1800000 0x400000>;
[all …]
H A Dzynqmp-zc1751-xm016-dc2.dts38 memory@0 {
40 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
90 ti,rx-internal-delay = <0x8>;
91 ti,tx-internal-delay = <0xa>;
92 ti,fifo-depth = <0x1>;
106 reg = <0x20>;
114 reg = <0x68>;
123 partition@0 { /* for testing purpose */
125 reg = <0x0 0x0 0x400000>;
129 reg = <0x0 0x400000 0x1400000>;
[all …]
H A Dzynq-cc108.dts29 memory@0 {
31 reg = <0x0 0x20000000>;
36 #phy-cells = <0>;
41 #phy-cells = <0>;
58 is-dual = <0>;
60 flash@0 { /* 16 MB */
62 reg = <0x0>;
68 partition@0 {
70 reg = <0x0 0x400000>; /* 4MB */
74 reg = <0x400000 0x400000>; /* 4MB */
[all …]
H A Ddragonboard820c.dts29 reg = <0 0x80000000 0 0xc0000000>;
38 reg = <0x0 0x86300000 0x0 0x200000>;
56 ranges = <0 0 0 0xffffffff>;
64 reg = <0x300000 0x90000>;
69 reg = <0x1010000 0x400000>;
81 reg = <0x75b0000 0x1000>;
84 pinctrl-0 = <&blsp8_uart>;
89 reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
90 index = <0x0>;
92 clock = <&gcc 0>;
[all …]
H A Ddragonboard410c.dts16 qcom,msm-id = <0xce 0x0 0xf8 0x0 0xf9 0x0 0xfa 0x0 0xf7 0x0>;
17 qcom,board-id = <0x10018 0x0>;
18 #address-cells = <0x2>;
19 #size-cells = <0x2>;
27 reg = <0 0x80000000 0 0x3da00000>;
36 reg = <0x0 0x86300000 0x0 0x100000>;
52 #address-cells = <0x1>;
53 #size-cells = <0x1>;
54 ranges = <0x0 0x0 0x0 0xffffffff>;
59 reg = <0x60000 0x8000>;
[all …]
/openbmc/linux/drivers/virt/nitro_enclaves/
H A Dne_misc_dev_test.c6 #define INVALID_VALUE (~0ull)
17 * Add the region from 0x1000 to (0x1000 + 0x200000 - 1):
22 * num = 0
25 {0x1000, 0x200000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
28 * Add the region from 0x200000 to (0x200000 + 0x1000 - 1):
33 * num = 0
36 {0x200000, 0x1000, -EINVAL, 0, INVALID_VALUE, INVALID_VALUE},
39 * Add the region from 0x200000 to (0x200000 + 0x200000 - 1):
46 * {start=0x200000, end=0x3fffff}, // len=0x200000
49 {0x200000, 0x200000, 0, 1, 0x200000, 0x200000},
[all …]
/openbmc/linux/arch/powerpc/boot/
H A Dcuboot-hotfoot.c26 u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f; in hotfoot_fixups()
30 dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0); in hotfoot_fixups()
41 if ((bd.bi_enet1addr[0] == 0) && in hotfoot_fixups()
42 (bd.bi_enet1addr[1] == 0) && in hotfoot_fixups()
43 (bd.bi_enet1addr[2] == 0) && in hotfoot_fixups()
44 (bd.bi_enet1addr[3] == 0) && in hotfoot_fixups()
45 (bd.bi_enet1addr[4] == 0) && in hotfoot_fixups()
46 (bd.bi_enet1addr[5] == 0)) { in hotfoot_fixups()
62 ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900); in hotfoot_fixups()
65 if (bd.bi_flashsize < 0x800000) { in hotfoot_fixups()
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D179.out11 2 MiB (0x200000) bytes not allocated at offset 0 bytes (0x0)
12 2 MiB (0x200000) bytes allocated at offset 2 MiB (0x200000)
13 2 MiB (0x200000) bytes not allocated at offset 4 MiB (0x400000)
14 2 MiB (0x200000) bytes allocated at offset 6 MiB (0x600000)
15 56 MiB (0x3800000) bytes not allocated at offset 8 MiB (0x800000)
16 [{ "start": 0, "length": 2097152, "depth": 0, "present": false, "zero": true, "data": false, "compr…
17 { "start": 2097152, "length": 2097152, "depth": 0, "present": true, "zero": true, "data": false, "c…
18 { "start": 4194304, "length": 2097152, "depth": 0, "present": false, "zero": true, "data": false, "…
19 { "start": 6291456, "length": 2097152, "depth": 0, "present": true, "zero": true, "data": false, "c…
20 { "start": 8388608, "length": 58720256, "depth": 0, "present": false, "zero": true, "data": false, …
[all …]
/openbmc/linux/drivers/mtd/chips/
H A Dfwh_lock.h7 FWH_UNLOCKED = 0,
37 if (chip->start < 0x400000) { in fwh_xxlock_oneblock()
38 pr_debug( "MTD %s(): chip->start: %lx wanted >= 0x400000\n", in fwh_xxlock_oneblock()
49 * which is 0 at the start of the chip, and then the offset of in fwh_xxlock_oneblock()
53 adr = (adr & ~0xffffUL) | 0x2; in fwh_xxlock_oneblock()
54 adr += chip->start - 0x400000; in fwh_xxlock_oneblock()
76 return 0; in fwh_xxlock_oneblock()
/openbmc/u-boot/board/freescale/ls1088a/
H A DKconfig18 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP
19 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
24 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP
25 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
49 default 0x20400000 if SYS_LS_PPA_FW_IN_XIP
50 default 0x400000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
55 default 0x20680000 if SYS_LS_PPA_FW_IN_XIP
56 default 0x680000 if SYS_LS_PPA_FW_IN_MMC || SYS_LS_PPA_FW_IN_NAND
/openbmc/linux/tools/perf/tests/attr/
H A Dtest-record-user-regs-sve-aarch649 auxv = auxv["AT_HWCAP"] & 0x400000 == 0x400000
/openbmc/u-boot/doc/device-tree-bindings/spmi/
H A Dspmi-msm.txt13 - #address-cells: 0x1 - childs slave ID address
14 - #size-cells: 0x1
23 reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>;
24 #address-cells = <0x1>;
25 #size-cells = <0x1>;
/openbmc/linux/arch/powerpc/kernel/
H A Dvecemu.c25 0x800000,
26 0x8b95c2,
27 0x9837f0,
28 0xa5fed7,
29 0xb504f3,
30 0xc5672a,
31 0xd744fd,
32 0xeac0c7
45 exp = ((s >> 23) & 0xff) - 127; in eexp2()
48 if (exp == 128 && (s & 0x7fffff) != 0) in eexp2()
[all …]
/openbmc/linux/drivers/accel/habanalabs/include/goya/asic_reg/
H A Dpsoc_global_conf_masks.h23 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_SHIFT 0
24 #define PSOC_GLOBAL_CONF_NON_RST_FLOPS_VAL_MASK 0xFFFFFFFF
27 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_SHIFT 0
28 #define PSOC_GLOBAL_CONF_PCI_FW_FSM_EN_MASK 0x1
31 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_SHIFT 0
32 #define PSOC_GLOBAL_CONF_BOOT_SEQ_RE_START_IND_MASK 0x1
35 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_SHIFT 0
36 #define PSOC_GLOBAL_CONF_BTM_FSM_STATE_MASK 0xF
39 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_SHIFT 0
40 #define PSOC_GLOBAL_CONF_SW_BTM_FSM_CTRL_MASK 0xF
[all …]
/openbmc/u-boot/doc/
H A DREADME.commands.spl20 nand read 0x82000000 0x280000 0x400000 /* Read kernel image from NAND*/
22 nand erase 0x680000 0x20000 /* erase - one page */
23 nand write 0x80000100 0x680000 0x20000 /* write the image - one page */
27 nand read 0x82000000 0x280000 0x400000 /* Read kernel image from NAND*/
28 tftpboot 0x80000100 devkit8000.dtb /* Read fdt */
29 spl export fdt 0x82000000 - 0x80000100 /* export FDT */
30 nand erase 0x680000 0x20000 /* erase - one page */
31 nand write <adress shown by spl export> 0x680000 0x20000
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-mirabox.dts20 memory@0 {
22 reg = <0x00000000 0x20000000>; /* 512 MB */
26 ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
27 MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
28 MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
42 pinctrl-0 = <&pwr_led_pin &stat_led_pins>;
52 gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
71 pinctrl-0 = <&ge1_rgmii_pins>;
83 pinctrl-0 = <&sdio_pins3>;
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman-0.dtsi2 * QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x40 0xc>;
48 muram@0 {
50 reg = <0x0 0x28000>;
54 cell-index = <0x1>;
[all …]
H A Dqoriq-fman3l-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x30000>;
54 cell-index = <0x2>;
[all …]
H A Dqoriq-fman3-0.dtsi2 * QorIQ FMan v3 device tree stub [ controller @ offset 0x400000 ]
38 cell-index = <0>;
40 ranges = <0 0x400000 0xfe000>;
41 reg = <0x400000 0xfe000>;
42 interrupts = <96 2 0 0>, <16 2 1 1>;
43 clocks = <&clockgen 3 0>;
45 fsl,qman-channel-range = <0x800 0x10>;
48 muram@0 {
50 reg = <0x0 0x60000>;
54 cell-index = <0x2>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-tlmm.yaml65 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
107 reg = <0x500000 0x400000>,
108 <0x900000 0x400000>,
109 <0xd00000 0x400000>;
116 gpio-ranges = <&tlmm 0 0 114>;
H A Dqcom,sm6125-tlmm.yaml73 - pattern: "^gpio[0-9]|[1-9][0-9]|1[0-2][0-9]|13[0-2]$"
113 reg = <0x00500000 0x400000>,
114 <0x00900000 0x400000>,
115 <0x00d00000 0x400000>;
119 gpio-ranges = <&tlmm 0 0 134>;
H A Dqcom,sdm630-pinctrl.yaml77 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-3])$"
141 reg = <0x03100000 0x400000>,
142 <0x03500000 0x400000>,
143 <0x03900000 0x400000>;
147 gpio-ranges = <&tlmm 0 0 114>;
/openbmc/linux/tools/testing/selftests/ptrace/
H A Dget_set_sud.c22 int ret = 0; in TEST()
26 ASSERT_GE(child, 0); in TEST()
27 if (child == 0) { in TEST()
28 ASSERT_EQ(0, sys_ptrace(PTRACE_TRACEME, 0, 0, 0)) { in TEST()
35 waitpid(child, &status, 0); in TEST()
37 memset(&config, 0xff, sizeof(config)); in TEST()
43 ASSERT_EQ(ret, 0); in TEST()
45 ASSERT_EQ(config.selector, 0); in TEST()
46 ASSERT_EQ(config.offset, 0); in TEST()
47 ASSERT_EQ(config.len, 0); in TEST()
[all …]
/openbmc/linux/tools/perf/tests/
H A Dhists_common.h12 #define FAKE_MAP_PERF 0x400000
13 #define FAKE_MAP_BASH 0x400000
14 #define FAKE_MAP_LIBC 0x500000
15 #define FAKE_MAP_KERNEL 0xf00000
16 #define FAKE_MAP_LENGTH 0x100000

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