1*5b47271cSMateusz KulikowskiQualcomm SPMI arbiter/bus driver 2*5b47271cSMateusz Kulikowski 3*5b47271cSMateusz KulikowskiThis is bus driver for Qualcomm chips that use SPMI to communicate with PMICs. 4*5b47271cSMateusz Kulikowski 5*5b47271cSMateusz KulikowskiRequired properties: 6*5b47271cSMateusz Kulikowski- compatible: "qcom,spmi-pmic-arb" 7*5b47271cSMateusz Kulikowski- reg: Register block adresses and sizes for various parts of device: 8*5b47271cSMateusz Kulikowski 1) PMIC arbiter channel mapping base (PMIC_ARB_REG_CHNLn) 9*5b47271cSMateusz Kulikowski 2) SPMI write command (master) registers (PMIC_ARB_CORE_SW_DEC_CHANNELS) 10*5b47271cSMateusz Kulikowski 3) SPMI read command (observer) registers (PMIC_ARB_CORE_REGISTERS_OBS) 11*5b47271cSMateusz Kulikowski 12*5b47271cSMateusz KulikowskiOptional properties (if not set by parent): 13*5b47271cSMateusz Kulikowski- #address-cells: 0x1 - childs slave ID address 14*5b47271cSMateusz Kulikowski- #size-cells: 0x1 15*5b47271cSMateusz Kulikowski 16*5b47271cSMateusz KulikowskiAll PMICs should be placed as a child nodes of bus arbiter. 17*5b47271cSMateusz KulikowskiAutomatic detection of childs is currently not supported. 18*5b47271cSMateusz Kulikowski 19*5b47271cSMateusz KulikowskiExample: 20*5b47271cSMateusz Kulikowski 21*5b47271cSMateusz Kulikowskispmi@200f000 { 22*5b47271cSMateusz Kulikowski compatible = "qcom,spmi-pmic-arb"; 23*5b47271cSMateusz Kulikowski reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>; 24*5b47271cSMateusz Kulikowski #address-cells = <0x1>; 25*5b47271cSMateusz Kulikowski #size-cells = <0x1>; 26*5b47271cSMateusz Kulikowski}; 27