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/openbmc/u-boot/board/hisilicon/poplar/
H A DREADME158 => tftp 0x30000000 fastboot.bin
161 scanning bus 0 for devices... 1 USB Device(s) found
164 scanning usb for storage devices... 0 Storage Device(s) found
170 Load address: 0x30000000
178 => mmc write 0x30000000 0 0x780
180 MMC write: dev # 0, block # 0, count 1920 ... 1920 blocks written: OK
190 => fatls usb 0:2
193 1 file(s), 0 dir(s)
195 => fatload usb 0:2 0x30000000 fastboot.bin
199 => mmc write 0x30000000 0 0x780
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am64.dtsi53 ranges = <0x00 0x000f4000 0x00 0x000f4000 0x00 0x000002d0>, /* PINCTRL */
54 <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
55 <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
56 <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
57 <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
58 <0x00 0x01000000 0x00 0x01000000 0x00 0x02330400>, /* First peripheral window */
59 <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
60 <0x00 0x0d000000 0x00 0x0d000000 0x00 0x00800000>, /* PCIE_CORE */
61 <0x00 0x0e000000 0x00 0x0e000000 0x00 0x00000100>, /* Main RTI0 */
62 <0x00 0x0e010000 0x00 0x0e010000 0x00 0x00000100>, /* Main RTI1 */
[all …]
/openbmc/u-boot/configs/
H A Dpoplar_defconfig3 CONFIG_SYS_TEXT_BASE=0x37000000
15 CONFIG_FASTBOOT_BUF_ADDR=0x20000000
16 CONFIG_FASTBOOT_BUF_SIZE=0x10000000
18 CONFIG_FASTBOOT_FLASH_MMC_DEV=0
27 CONFIG_USB_GADGET_VENDOR_NUM=0x18d1
28 CONFIG_USB_GADGET_PRODUCT_NUM=0xd00d
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dipq806x-dwmac.txt23 reg = <0x37000000 0x200000>;
H A Dqcom,ipq8064-mdio.yaml44 #size-cells = <0>;
47 reg = <0x37000000 0x200000>;
53 reg = <0x10>;
57 #size-cells = <0>;
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dintel,keembay-pcie-ep.yaml57 reg = <0x37000000 0x00001000>,
58 <0x37100000 0x00001000>,
59 <0x37300000 0x00001000>,
60 <0x36000000 0x01000000>,
61 <0x37800000 0x00000200>;
H A Dintel,keembay-pcie.yaml79 reg = <0x37000000 0x00001000>,
80 <0x37300000 0x00001000>,
81 <0x36e00000 0x00200000>,
82 <0x37800000 0x00000200>;
87 ranges = <0x02000000 0 0x36000000 0x36000000 0 0x00e00000>;
/openbmc/u-boot/include/configs/
H A DBSC9131RDB.h18 #define CONFIG_RESET_VECTOR_ADDRESS 0x110bfffc
27 #define CONFIG_SPL_TEXT_BASE 0xFFFFE000
29 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000
30 #define CONFIG_SPL_RELOC_STACK 0x00100000
31 #define CONFIG_SYS_NAND_U_BOOT_SIZE ((768 << 10) - 0x2000)
32 #define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE)
33 #define CONFIG_SYS_NAND_U_BOOT_START 0x00200000
34 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0
62 #define CONFIG_SYS_MEMTEST_START 0x01000000 /* memtest works on */
63 #define CONFIG_SYS_MEMTEST_END 0x01ffffff
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dinsn.h18 AARCH64_INSN_HINT_NOP = 0x0 << 5,
19 AARCH64_INSN_HINT_YIELD = 0x1 << 5,
20 AARCH64_INSN_HINT_WFE = 0x2 << 5,
21 AARCH64_INSN_HINT_WFI = 0x3 << 5,
22 AARCH64_INSN_HINT_SEV = 0x4 << 5,
23 AARCH64_INSN_HINT_SEVL = 0x5 << 5,
25 AARCH64_INSN_HINT_XPACLRI = 0x07 << 5,
26 AARCH64_INSN_HINT_PACIA_1716 = 0x08 << 5,
27 AARCH64_INSN_HINT_PACIB_1716 = 0x0A << 5,
28 AARCH64_INSN_HINT_AUTIA_1716 = 0x0C << 5,
[all …]
/openbmc/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/openbmc/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0>;
54 polling-delay-passive = <0>;
55 polling-delay = <0>;
56 thermal-sensors = <&tsens 0>;
74 polling-delay-passive = <0>;
75 polling-delay = <0>;
94 polling-delay-passive = <0>;
95 polling-delay = <0>;
[all …]
/openbmc/linux/drivers/gpu/drm/sun4i/
H A Dsun8i_vi_scaler.c15 0x40000000, 0x40fe0000, 0x3ffd0100, 0x3efc0100,
16 0x3efb0100, 0x3dfa0200, 0x3cf90200, 0x3bf80200,
17 0x39f70200, 0x37f70200, 0x35f70200, 0x33f70200,
18 0x31f70200, 0x2ef70200, 0x2cf70200, 0x2af70200,
19 0x27f70200, 0x24f80100, 0x22f80100, 0x1ef90100,
20 0x1cf90100, 0x19fa0100, 0x17fa0100, 0x14fb0100,
21 0x11fc0000, 0x0ffc0000, 0x0cfd0000, 0x0afd0000,
22 0x08fe0000, 0x05ff0000, 0x03ff0000, 0x02000000,
24 0x3806fc02, 0x3805fc02, 0x3803fd01, 0x3801fe01,
25 0x3700fe01, 0x35ffff01, 0x35fdff01, 0x34fc0001,
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_2_3_default.h26 #define mmBIF_BX_PF_MM_INDEX_DEFAULT 0x00000000
27 #define mmBIF_BX_PF_MM_DATA_DEFAULT 0x00000000
28 #define mmBIF_BX_PF_MM_INDEX_HI_DEFAULT 0x00000000
32 #define mmSYSHUB_INDEX_OVLP_DEFAULT 0x00000000
33 #define mmSYSHUB_DATA_OVLP_DEFAULT 0x00000000
34 #define mmPCIE_INDEX_DEFAULT 0x00000000
35 #define mmPCIE_DATA_DEFAULT 0x00000000
36 #define mmPCIE_INDEX2_DEFAULT 0x00000000
37 #define mmPCIE_DATA2_DEFAULT 0x00000000
38 #define mmSBIOS_SCRATCH_0_DEFAULT 0x00000000
[all …]
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc20 QEMU_BUILD_BUG_ON(TCG_TYPE_I32 != 0 || TCG_TYPE_I64 != 1);
71 tcg_debug_assert(slot >= 0 && slot <= 1);
87 if (offset == sextract64(offset, 0, 26)) {
90 *src_rw = deposit32(*src_rw, 0, 26, offset);
101 if (offset == sextract64(offset, 0, 19)) {
113 if (offset == sextract64(offset, 0, 14)) {
123 tcg_debug_assert(addend == 0);
137 #define TCG_CT_CONST_AIMM 0x100
138 #define TCG_CT_CONST_LIMM 0x200
139 #define TCG_CT_CONST_ZERO 0x400
[all …]