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/openbmc/linux/arch/arc/include/asm/
H A Dperf_event.h15 #define ARC_REG_CC_BUILD 0xF6
16 #define ARC_REG_CC_INDEX 0x240
17 #define ARC_REG_CC_NAME0 0x241
18 #define ARC_REG_CC_NAME1 0x242
20 #define ARC_REG_PCT_BUILD 0xF5
21 #define ARC_REG_PCT_COUNTL 0x250
22 #define ARC_REG_PCT_COUNTH 0x251
23 #define ARC_REG_PCT_SNAPL 0x252
24 #define ARC_REG_PCT_SNAPH 0x253
25 #define ARC_REG_PCT_CONFIG 0x254
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Drenesas,rz-ssi.yaml65 bits[0:9] - Specifies MID/RID value of a SSI channel as below
66 MID/RID value of SSI rx0 = 0x256
67 MID/RID value of SSI tx0 = 0x255
68 MID/RID value of SSI rx1 = 0x25a
69 MID/RID value of SSI tx1 = 0x259
70 MID/RID value of SSI rt2 = 0x25f
71 MID/RID value of SSI rx3 = 0x262
72 MID/RID value of SSI tx3 = 0x261
75 bit[11] - LVL = 0, Detects based on the edge
77 bit[15] - TM = 0, Single transfer mode
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/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Ddata-fabric.json4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
5 "EventCode": "0x1f",
6 "UMask": "0x7fe",
13 "EventCode": "0x5f",
14 "UMask": "0x7fe",
21 "EventCode": "0x9f",
22 "UMask": "0x7fe",
29 "EventCode": "0xdf",
30 "UMask": "0x7fe",
37 "EventCode": "0x11f",
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/openbmc/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni-cmd.h13 #define DPNI_VER_MINOR 0
23 #define DPNI_CMDID_OPEN DPNI_CMD(0x801)
24 #define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
25 #define DPNI_CMDID_CREATE DPNI_CMD(0x901)
26 #define DPNI_CMDID_DESTROY DPNI_CMD(0x900)
27 #define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
29 #define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
30 #define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
31 #define DPNI_CMDID_GET_ATTR DPNI_CMD(0x004)
32 #define DPNI_CMDID_RESET DPNI_CMD(0x005)
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/openbmc/smbios-mdr/include/
H A Dcpu.hpp50 // This table is up to date as of SMBIOS spec DSP0134 3.7.0
52 {0x01, "Other"},
53 {0x02, "Unknown"},
54 {0x03, "8086"},
55 {0x04, "80286"},
56 {0x05, "Intel 386 processor"},
57 {0x06, "Intel 486 processor"},
58 {0x07, "8087"},
59 {0x08, "80287"},
60 {0x09, "80387"},
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/openbmc/linux/sound/drivers/opl4/
H A Dopl4_synth.c41 #define MIDI_CTL_RELEASE_TIME 0x48
42 #define MIDI_CTL_ATTACK_TIME 0x49
43 #define MIDI_CTL_DECAY_TIME 0x4b
44 #define MIDI_CTL_VIBRATO_RATE 0x4c
45 #define MIDI_CTL_VIBRATO_DEPTH 0x4d
46 #define MIDI_CTL_VIBRATO_DELAY 0x4e
52 static const s16 snd_opl4_pitch_map[0x600] = {
53 0x000,0x000,0x001,0x001,0x002,0x002,0x003,0x003,
54 0x004,0x004,0x005,0x005,0x006,0x006,0x006,0x007,
55 0x007,0x008,0x008,0x009,0x009,0x00a,0x00a,0x00b,
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/openbmc/linux/drivers/media/usb/gspca/
H A Dstk1135.c51 if (gspca_dev->usb_err < 0) in reg_r()
52 return 0; in reg_r()
53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r()
54 0x00, in reg_r()
56 0x00, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
63 if (ret < 0) { in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
66 return 0; in reg_r()
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/openbmc/qemu/hw/i2c/
H A Daspeed_i2c.c120 value = extract64(bus->dma_dram_offset, 0, 32); in aspeed_i2c_bus_old_read()
131 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, offset); in aspeed_i2c_bus_old_read()
167 value = extract64(bus->dma_dram_offset, 0, 32); in aspeed_i2c_bus_new_read()
186 "%s: Bad offset 0x%" HWADDR_PRIx "\n", __func__, offset); in aspeed_i2c_bus_new_read()
241 return 0; in aspeed_i2c_dma_read()
257 for (i = 0; i < pool_tx_count; i++) { in aspeed_i2c_bus_send()
267 SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, TX_BUFF_EN, 0); in aspeed_i2c_bus_send()
271 ARRAY_FIELD_DP32(bus->regs, I2CM_DMA_LEN_STS, TX_LEN, 0); in aspeed_i2c_bus_send()
289 SHARED_ARRAY_FIELD_DP32(bus->regs, reg_cmd, TX_DMA_EN, 0); in aspeed_i2c_bus_send()
291 trace_aspeed_i2c_bus_send("BYTE", 0, 1, in aspeed_i2c_bus_send()
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/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_n.h11 #define B43_NPHY_BBCFG B43_PHY_N(0x001) /* BB config */
12 #define B43_NPHY_BBCFG_RSTCCA 0x4000 /* Reset CCA */
13 #define B43_NPHY_BBCFG_RSTRX 0x8000 /* Reset RX */
14 #define B43_NPHY_CHANNEL B43_PHY_N(0x005) /* Channel */
15 #define B43_NPHY_TXERR B43_PHY_N(0x007) /* TX error */
16 #define B43_NPHY_BANDCTL B43_PHY_N(0x009) /* Band control */
17 #define B43_NPHY_BANDCTL_5GHZ 0x0001 /* Use the 5GHz band */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
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/openbmc/linux/drivers/hid/
H A Dhid-input.c28 0, 0, 0, 0, 30, 48, 46, 32, 18, 33, 34, 35, 23, 36, 37, 38,
49 } hid_hat_to_axis[] = {{ 0, 0}, { 0,-1}, { 1,-1}, { 1, 0}, { 1, 1}, { 0, 1}, {-1, 1}, {-1, 0}, {-1…
71 * defined in the next 8 bits (defined by 0xff - slot).
136 unsigned int i, j, k, cur_idx = 0; in hidinput_find_key()
142 for (i = 0; i < report->maxfield; i++) { in hidinput_find_key()
143 for (j = 0; j < report->field[i]->maxusage; j++) { in hidinput_find_key()
145 if (usage->type == EV_KEY || usage->type == 0) { in hidinput_find_key()
169 else if (input_scancode_to_scalar(ke, &scancode) == 0) in hidinput_locate_usage()
192 return 0; in hidinput_getkeycode()
224 return 0; in hidinput_setkeycode()
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/phy/
H A Dphy_n.c28 radio_type##_##jspace##0 : \
34 radio_type##_##jspace##0 : \
42 radio_type##_##jspace##0##_##reg_name : \
47 radio_type##_##jspace##0##_##reg_name : \
53 radio_type##_##reg_name##_##jspace##0 : \
58 radio_type##_##reg_name##_##jspace##0 : \
107 #define NPHY_RSSICAL_NB_TARGET 0
120 #define NPHY_RSSI_SXT(x) ((s8) (-((x) & 0x20) + ((x) & 0x1f)))
129 #define NPHY_N_GCTL 0x66
135 #define NPHY_PAPD_COMP_OFF 0
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/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dxtensa-modules.c.inc31 { "LBEG", 0, 0 },
32 { "LEND", 1, 0 },
33 { "LCOUNT", 2, 0 },
34 { "BR", 4, 0 },
35 { "ACCLO", 16, 0 },
36 { "ACCHI", 17, 0 },
37 { "M0", 32, 0 },
38 { "M1", 33, 0 },
39 { "M2", 34, 0 },
40 { "M3", 35, 0 },
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