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/openbmc/u-boot/include/configs/
H A Dat91sam9rlek.h45 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
68 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
71 #define CONFIG_SYS_MEMTEST_END 0x23e00000
76 #define CONFIG_ENV_OFFSET 0x4200
77 #define CONFIG_ENV_SIZE 0x4200
78 #define CONFIG_ENV_SECT_SIZE 0x210
79 #define CONFIG_BOOTCOMMAND "sf probe 0; " \
80 "sf read 0x22000000 0x84000 0x294000; " \
81 "bootm 0x22000000"
86 #define CONFIG_ENV_OFFSET 0x140000
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H A Dat91-sama5_common.h41 #define CONFIG_ENV_OFFSET 0x2000
42 #define CONFIG_ENV_SIZE 0x1000
43 #define CONFIG_SYS_MMC_ENV_DEV 0
46 #define CONFIG_ENV_SIZE 0x4000
52 "fatload mmc 0:1 0x21000000 ${dtb_name}; " \
53 "fatload mmc 0:1 0x22000000 zImage; " \
54 "bootz 0x22000000 - 0x21000000"
60 #define CONFIG_ENV_OFFSET 0x140000
61 #define CONFIG_ENV_OFFSET_REDUND 0x100000
62 #define CONFIG_ENV_SIZE 0x20000
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H A Dat91sam9x5ek.h34 #define CONFIG_SYS_SDRAM_BASE 0x20000000
35 #define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
45 #define CONFIG_SYS_NAND_BASE 0x40000000
68 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
71 #define CONFIG_SYS_MEMTEST_END 0x26e00000
75 #define CONFIG_ENV_OFFSET 0x140000
76 #define CONFIG_ENV_OFFSET_REDUND 0x100000
77 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
79 "0x22000000 0x200000 0x600000; " \
80 "nand read 0x21000000 0x180000 0x20000; " \
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H A Dsama5d2_xplained.h15 #define CONFIG_SYS_SDRAM_BASE 0x20000000
16 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
19 #define CONFIG_SYS_INIT_SP_ADDR 0x218000
25 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
34 #define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 at91-sama5d2_…
35 "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
36 "bootz 0x22000000 - 0x21000000"
43 #define CONFIG_BOOTCOMMAND "ext4load mmc 0:1 0x21000000 /boot/at91-sama5d2_xplained.dtb; " \
44 "ext4load mmc 0:1 0x22000000 /boot/zImage; " \
45 "bootz 0x22000000 - 0x21000000"
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H A Dat91sam9n12ek.h36 #define CONFIG_SYS_SDRAM_BASE 0x20000000
37 #define CONFIG_SYS_SDRAM_SIZE 0x08000000
45 (0x00300000 + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
52 #define CONFIG_SYS_NAND_BASE 0x40000000
60 "console=console=ttyS0,115200\0" \
61 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
62 "bootargs_nand=rootfstype=ubifs ubi.mtd=7 root=ubi0:rootfs rw\0"\
63 "bootargs_mmc=root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait\0"
67 #define CONFIG_KS8851_MLL_BASEADDR 0x30000000 /* use NCS2 */
69 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
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H A Dat91sam9260ek.h57 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
106 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */
110 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
113 #define CONFIG_SYS_MEMTEST_END 0x23e00000
118 #define CONFIG_ENV_OFFSET 0x4200
119 #define CONFIG_ENV_SIZE 0x4200
120 #define CONFIG_ENV_SECT_SIZE 0x210
121 #define CONFIG_BOOTCOMMAND "sf probe 0:0; " \
122 "sf read 0x22000000 0x84000 0x294000; " \
123 "bootm 0x22000000"
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H A Dsama5d27_som1_ek.h18 #define CONFIG_SYS_SDRAM_BASE 0x20000000
19 #define CONFIG_SYS_SDRAM_SIZE 0x8000000
22 #define CONFIG_SYS_INIT_SP_ADDR 0x218000
28 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
38 #define CONFIG_ENV_SIZE 0x4000
40 #define CONFIG_BOOTCOMMAND "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x21000000 at91-sama5d27…
41 "fatload mmc " CONFIG_ENV_FAT_DEVICE_AND_PART " 0x22000000 zImage; " \
42 "bootz 0x22000000 - 0x21000000"
46 #define CONFIG_ENV_OFFSET 0xb0000
47 #define CONFIG_ENV_SIZE 0x10000
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H A Dat91sam9261ek.h54 #define CONFIG_SYS_SDRAM_BASE 0x20000000
55 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
62 #define CONFIG_SYS_NAND_BASE 0x40000000
75 #define CONFIG_DM9000_BASE 0x30000000
88 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
96 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
99 #define CONFIG_SYS_MEMTEST_END 0x23e00000
104 #define CONFIG_ENV_OFFSET 0x4200
105 #define CONFIG_ENV_SIZE 0x4200
106 #define CONFIG_ENV_SECT_SIZE 0x210
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H A Dpm9261.h56 #define CONFIG_SYS_PIOC_PDR_VAL1 0xFFFF0000
58 #define CONFIG_SYS_PIOC_PPUDR_VAL 0xFFFF0000
60 /* EBI_CSA, no pull-ups for D[15:0], CS1 SDRAM, CS3 NAND Flash */
68 #define CONFIG_SYS_SDRC_TR_VAL1 0x13C
86 #define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */
88 #define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */
89 #define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */
90 #define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */
91 #define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */
92 #define CONFIG_SYS_SDRAM_VAL6 0 /* SDRAM_BASE */
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H A Dpm9263.h40 AT91_PMC_PLLXR_PLLCOUNT(0x3f) | /* PLL Counter */\
68 #define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000
70 #define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000
78 #define CONFIG_SYS_SDRC_MR_VAL1 0
80 #define CONFIG_SYS_SDRC_TR_VAL1 0x3AA
98 #define CONFIG_SYS_SDRAM_VAL1 0 /* SDRAM_BASE */
100 #define CONFIG_SYS_SDRAM_VAL2 0 /* SDRAM_BASE */
101 #define CONFIG_SYS_SDRAM_VAL3 0 /* SDRAM_BASE */
102 #define CONFIG_SYS_SDRAM_VAL4 0 /* SDRAM_BASE */
103 #define CONFIG_SYS_SDRAM_VAL5 0 /* SDRAM_BASE */
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H A Dwb50n.h40 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
43 #define CONFIG_SYS_INIT_SP_ADDR 0x310000
49 #define CONFIG_SYS_MEMTEST_START 0x21000000
50 #define CONFIG_SYS_MEMTEST_END 0x22000000
70 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
73 "autoload=no\0" \
74 "autostart=no\0"
77 #define CONFIG_ENV_OFFSET 0xA0000
78 #define CONFIG_ENV_OFFSET_REDUND 0xC0000
79 #define CONFIG_ENV_SIZE 0x20000
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H A Dpicosam9g45.h48 #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000
66 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
68 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
87 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
90 #define CONFIG_SYS_MEMTEST_END 0x23e00000
94 #define CONFIG_ENV_SIZE 0x4000
96 #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \
97 "fatload mmc 0:1 0x22000000 zImage; " \
98 "bootz 0x22000000 - 0x21000000"
104 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
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H A Dat91sam9263ek.h56 #define CONFIG_SYS_SDRAM_SIZE 0x04000000
63 #define PHYS_FLASH_1 0x10000000
68 #define CONFIG_SYS_MONITOR_SEC 1:0-3
71 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x007E0000)
75 #define CONFIG_ENV_SIZE 0x10000
78 "monitor_base=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \
83 "protect on ${monitor_base} +${filesize}\0"
111 #define CONFIG_SYS_PIOD_PDR_VAL1 0xFFFF0000
113 #define CONFIG_SYS_PIOD_PPUDR_VAL 0xFFFF0000
121 #define CONFIG_SYS_SDRC_MR_VAL1 0
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H A Dvinco.h21 #define CONFIG_USART_BASE 0xfc00c000
25 #define CONFIG_SYS_TIMER_COUNTER 0xfc06863c
28 #define CONFIG_SYS_SDRAM_BASE 0x20000000
29 #define CONFIG_SYS_SDRAM_SIZE 0x4000000
34 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
48 #define ATMEL_BASE_MMCI 0xfc000000
70 #define CONFIG_ENV_OFFSET 0x10000
71 #define CONFIG_ENV_SIZE 0x10000
75 #define CONFIG_BOOTCOMMAND "mmc dev 0 0;" \
81 "kernel_start=0x20000\0" \
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H A Dwb45n.h35 #define CONFIG_SYS_SDRAM_BASE 0x20000000
36 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 MB */
43 #define CONFIG_SYS_NAND_BASE 0x40000000
63 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
65 #define CONFIG_SYS_MEMTEST_END 0x23e00000
69 #define CONFIG_ENV_OFFSET 0xa0000
70 #define CONFIG_ENV_OFFSET_REDUND 0xc0000
71 #define CONFIG_ENV_SIZE 0x20000 /* 1 block = 128 kB */
73 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xe0000 0x280000; " \
98 "_mtd=mtdparts default; setenv bootargs ${bootargs} ${mtdparts}\0" \
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H A Dethernut5.h30 #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */
36 #define CONFIG_SYS_SDRAM_BASE 0x20000000
47 # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */
54 #define CONFIG_ENV_OFFSET 0x3DE000
61 #define CONFIG_SYS_NAND_BASE 0x40000000
80 #define CONFIG_PHY_ID 0
95 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
103 #define CONFIG_SYS_I2C_RTC_ADDR 0x51
112 #define CONFIG_SYS_I2C_SOFT_SLAVE 0
120 at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
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H A Dtaurus.h70 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
94 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
113 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000
117 #define CONFIG_SYS_LOAD_ADDR 0x22000000
120 #define CONFIG_ENV_OFFSET 0x100000
121 #define CONFIG_ENV_OFFSET_REDUND 0x180000
123 #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
129 ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000)
132 #define CONFIG_SPL_TEXT_BASE 0x0
149 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000
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H A Dpeach-pit.h12 "bootm_size=0x10000000\0" \
13 "kernel_addr_r=0x22000000\0" \
14 "fdt_addr_r=0x23000000\0" \
15 "ramdisk_addr_r=0x23300000\0" \
16 "scriptaddr=0x30000000\0" \
17 "pxefile_addr_r=0x31000000\0"
23 #define CONFIG_SYS_SDRAM_BASE 0x20000000
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
27 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
H A Dpeach-pi.h12 "bootm_size=0x10000000\0" \
13 "kernel_addr_r=0x22000000\0" \
14 "fdt_addr_r=0x23000000\0" \
15 "ramdisk_addr_r=0x23300000\0" \
16 "scriptaddr=0x30000000\0" \
17 "pxefile_addr_r=0x31000000\0"
23 #define CONFIG_SYS_SDRAM_BASE 0x20000000
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
27 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
H A Dsama5d2_ptc_ek.h19 #define CONFIG_SYS_SDRAM_BASE 0x20000000
20 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
25 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
H A Dsama5d4ek.h15 #define CONFIG_SYS_SDRAM_BASE 0x20000000
16 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
19 #define CONFIG_SYS_INIT_SP_ADDR 0x218000
25 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
30 #define CONFIG_SYS_NAND_BASE 0x80000000
39 #define CONFIG_SPL_TEXT_BASE 0x200000
40 #define CONFIG_SPL_MAX_SIZE 0x18000
41 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
42 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
43 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
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H A Dsama5d4_xplained.h15 #define CONFIG_SYS_SDRAM_BASE 0x20000000
16 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
19 #define CONFIG_SYS_INIT_SP_ADDR 0x218000
25 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
30 #define CONFIG_SYS_NAND_BASE 0x80000000
39 #define CONFIG_SPL_TEXT_BASE 0x200000
40 #define CONFIG_SPL_MAX_SIZE 0x18000
41 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
42 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
43 #define CONFIG_SYS_SPL_MALLOC_START 0x20080000
[all …]
H A Dsama5d3_xplained.h26 #define CONFIG_SYS_SDRAM_BASE 0x20000000
27 #define CONFIG_SYS_SDRAM_SIZE 0x10000000
30 #define CONFIG_SYS_INIT_SP_ADDR 0x318000
39 #define CONFIG_SYS_NAND_BASE 0x60000000
53 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00600000
58 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
61 #define CONFIG_SPL_TEXT_BASE 0x300000
62 #define CONFIG_SPL_MAX_SIZE 0x18000
63 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
64 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000
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H A Dsama5d3xek.h29 #define CONFIG_SAMA5D3_LCD_BASE 0x23E00000
33 #define CONFIG_SYS_FLASH_BASE 0x10000000
39 #define CONFIG_SYS_SDRAM_BASE 0x20000000
40 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
43 #define CONFIG_SYS_INIT_SP_ADDR 0x318000
54 #define CONFIG_SYS_NAND_BASE 0x60000000
72 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
75 #define CONFIG_SPL_TEXT_BASE 0x300000
76 #define CONFIG_SPL_MAX_SIZE 0x18000
77 #define CONFIG_SPL_BSS_START_ADDR 0x20000000
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/openbmc/linux/arch/arm/mach-ep93xx/
H A Dts72xx.h10 * febff000 22000000 4K model number register (bits 0-2)
19 #define TS72XX_MODEL_PHYS_BASE 0x22000000
20 #define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000)
21 #define TS72XX_MODEL_SIZE 0x00001000
23 #define TS72XX_MODEL_TS7200 0x00
24 #define TS72XX_MODEL_TS7250 0x01
25 #define TS72XX_MODEL_TS7260 0x02
26 #define TS72XX_MODEL_TS7300 0x03
27 #define TS72XX_MODEL_TS7400 0x04
28 #define TS72XX_MODEL_MASK 0x07
[all …]

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