1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 20f8bc283SHeiko Schocher /* 30f8bc283SHeiko Schocher * Common board functions for Siemens TAURUS (AT91SAM9G20) based boards 40f8bc283SHeiko Schocher * (C) Copyright 2013 Siemens AG 50f8bc283SHeiko Schocher * 60f8bc283SHeiko Schocher * Based on: 70f8bc283SHeiko Schocher * U-Boot file: include/configs/at91sam9260ek.h 80f8bc283SHeiko Schocher * 90f8bc283SHeiko Schocher * (C) Copyright 2007-2008 100f8bc283SHeiko Schocher * Stelian Pop <stelian@popies.net> 110f8bc283SHeiko Schocher * Lead Tech Design <www.leadtechdesign.com> 120f8bc283SHeiko Schocher */ 130f8bc283SHeiko Schocher 140f8bc283SHeiko Schocher #ifndef __CONFIG_H 150f8bc283SHeiko Schocher #define __CONFIG_H 160f8bc283SHeiko Schocher 170f8bc283SHeiko Schocher /* 180f8bc283SHeiko Schocher * SoC must be defined first, before hardware.h is included. 190f8bc283SHeiko Schocher * In this case SoC is defined in boards.cfg. 200f8bc283SHeiko Schocher */ 210f8bc283SHeiko Schocher #include <asm/hardware.h> 2240540823SHeiko Schocher #include <linux/sizes.h> 230f8bc283SHeiko Schocher 24389aee89SHeiko Schocher #if defined(CONFIG_SPL_BUILD) 25389aee89SHeiko Schocher #define CONFIG_SYS_ICACHE_OFF 26389aee89SHeiko Schocher #define CONFIG_SYS_DCACHE_OFF 27389aee89SHeiko Schocher #endif 280f8bc283SHeiko Schocher /* 290f8bc283SHeiko Schocher * Warning: changing CONFIG_SYS_TEXT_BASE requires 300f8bc283SHeiko Schocher * adapting the initial boot program. 310f8bc283SHeiko Schocher * Since the linker has to swallow that define, we must use a pure 320f8bc283SHeiko Schocher * hex number here! 330f8bc283SHeiko Schocher */ 340f8bc283SHeiko Schocher 350f8bc283SHeiko Schocher /* ARM asynchronous clock */ 360f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 370f8bc283SHeiko Schocher #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* main clock xtal */ 380f8bc283SHeiko Schocher 390f8bc283SHeiko Schocher /* Misc CPU related */ 400f8bc283SHeiko Schocher #define CONFIG_ARCH_CPU_INIT 410f8bc283SHeiko Schocher #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 420f8bc283SHeiko Schocher #define CONFIG_SETUP_MEMORY_TAGS 430f8bc283SHeiko Schocher #define CONFIG_INITRD_TAG 448e6e8221SHeiko Schocher #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY 450f8bc283SHeiko Schocher 460f8bc283SHeiko Schocher /* general purpose I/O */ 470f8bc283SHeiko Schocher #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 480f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO 490f8bc283SHeiko Schocher #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 500f8bc283SHeiko Schocher 510f8bc283SHeiko Schocher /* serial console */ 520f8bc283SHeiko Schocher #define CONFIG_ATMEL_USART 530f8bc283SHeiko Schocher #define CONFIG_USART_BASE ATMEL_BASE_DBGU 540f8bc283SHeiko Schocher #define CONFIG_USART_ID ATMEL_ID_SYS 550f8bc283SHeiko Schocher 560f8bc283SHeiko Schocher 570f8bc283SHeiko Schocher /* 580f8bc283SHeiko Schocher * SDRAM: 1 bank, min 32, max 128 MB 590f8bc283SHeiko Schocher * Initialized before u-boot gets started. 600f8bc283SHeiko Schocher */ 610f8bc283SHeiko Schocher #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 620ed366ffSHeiko Schocher #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M) 630f8bc283SHeiko Schocher 640f8bc283SHeiko Schocher /* 650f8bc283SHeiko Schocher * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, 660f8bc283SHeiko Schocher * leaving the correct space for initial global data structure above 670f8bc283SHeiko Schocher * that address while providing maximum stack area below. 680f8bc283SHeiko Schocher */ 690f8bc283SHeiko Schocher #define CONFIG_SYS_INIT_SP_ADDR \ 700f8bc283SHeiko Schocher (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) 710f8bc283SHeiko Schocher 720f8bc283SHeiko Schocher /* NAND flash */ 730f8bc283SHeiko Schocher #ifdef CONFIG_CMD_NAND 740f8bc283SHeiko Schocher #define CONFIG_SYS_MAX_NAND_DEVICE 1 750f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 760f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_DBW_8 770f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) 780f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) 790f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 800f8bc283SHeiko Schocher #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 810f8bc283SHeiko Schocher #endif 820f8bc283SHeiko Schocher 830f8bc283SHeiko Schocher /* Ethernet */ 840f8bc283SHeiko Schocher #define CONFIG_MACB 850f8bc283SHeiko Schocher #define CONFIG_RMII 860f8bc283SHeiko Schocher #define CONFIG_AT91_WANTS_COMMON_PHY 870f8bc283SHeiko Schocher 880f8bc283SHeiko Schocher /* USB */ 890f8bc283SHeiko Schocher #if defined(CONFIG_BOARD_TAURUS) 900f8bc283SHeiko Schocher #define CONFIG_USB_ATMEL 91e8b81eefSHeiko Schocher #define CONFIG_USB_ATMEL_CLK_SEL_PLLB 920f8bc283SHeiko Schocher #define CONFIG_USB_OHCI_NEW 930f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_CPU_INIT 940f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 950f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" 960f8bc283SHeiko Schocher #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 97e8b81eefSHeiko Schocher 98e8b81eefSHeiko Schocher /* USB DFU support */ 99e8b81eefSHeiko Schocher 100e8b81eefSHeiko Schocher #define CONFIG_USB_GADGET_AT91 101e8b81eefSHeiko Schocher 102e8b81eefSHeiko Schocher /* DFU class support */ 103e8b81eefSHeiko Schocher #define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M) 104e8b81eefSHeiko Schocher #define DFU_MANIFEST_POLL_TIMEOUT 25000 1050f8bc283SHeiko Schocher #endif 1060f8bc283SHeiko Schocher 10750921cdcSHeiko Schocher /* SPI EEPROM */ 10850921cdcSHeiko Schocher #define TAURUS_SPI_MASK (1 << 4) 10950921cdcSHeiko Schocher #define TAURUS_SPI_CS_PIN AT91_PIN_PA3 11050921cdcSHeiko Schocher 111a1655bb2SHeiko Schocher #if defined(CONFIG_SPL_BUILD) 112a1655bb2SHeiko Schocher /* SPL related */ 113a1655bb2SHeiko Schocher #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 114a1655bb2SHeiko Schocher #endif 115a1655bb2SHeiko Schocher 1160f8bc283SHeiko Schocher /* load address */ 1170f8bc283SHeiko Schocher #define CONFIG_SYS_LOAD_ADDR 0x22000000 1180f8bc283SHeiko Schocher 1190f8bc283SHeiko Schocher /* bootstrap in spi flash , u-boot + env + linux in nandflash */ 1200f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET 0x100000 1210f8bc283SHeiko Schocher #define CONFIG_ENV_OFFSET_REDUND 0x180000 1220ed366ffSHeiko Schocher #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ 1230f8bc283SHeiko Schocher #define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" 12440540823SHeiko Schocher 1250f8bc283SHeiko Schocher /* 1260f8bc283SHeiko Schocher * Size of malloc() pool 1270f8bc283SHeiko Schocher */ 1280f8bc283SHeiko Schocher #define CONFIG_SYS_MALLOC_LEN \ 129e8b81eefSHeiko Schocher ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) 1300f8bc283SHeiko Schocher 131237e3793SHeiko Schocher /* Defines for SPL */ 132237e3793SHeiko Schocher #define CONFIG_SPL_TEXT_BASE 0x0 13340540823SHeiko Schocher #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) 13440540823SHeiko Schocher #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) 135a1655bb2SHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ 136a1655bb2SHeiko Schocher CONFIG_SYS_MALLOC_LEN) 137a1655bb2SHeiko Schocher #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN 138237e3793SHeiko Schocher 139237e3793SHeiko Schocher #define CONFIG_SPL_BSS_START_ADDR CONFIG_SPL_MAX_SIZE 1400ed366ffSHeiko Schocher #define CONFIG_SPL_BSS_MAX_SIZE (3 * SZ_512) 141237e3793SHeiko Schocher 142237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14) 143237e3793SHeiko Schocher #define CONFIG_SYS_USE_NANDFLASH 1 144237e3793SHeiko Schocher #define CONFIG_SPL_NAND_DRIVERS 145237e3793SHeiko Schocher #define CONFIG_SPL_NAND_BASE 146237e3793SHeiko Schocher #define CONFIG_SPL_NAND_ECC 147237e3793SHeiko Schocher #define CONFIG_SPL_NAND_RAW_ONLY 148237e3793SHeiko Schocher #define CONFIG_SPL_NAND_SOFTECC 149237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x20000 150e8b81eefSHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K 151237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 152237e3793SHeiko Schocher #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE 153237e3793SHeiko Schocher #define CONFIG_SYS_NAND_5_ADDR_CYCLE 154237e3793SHeiko Schocher 1550ed366ffSHeiko Schocher #define CONFIG_SYS_NAND_SIZE (256 * SZ_1M) 1560ed366ffSHeiko Schocher #define CONFIG_SYS_NAND_PAGE_SIZE SZ_2K 1570ed366ffSHeiko Schocher #define CONFIG_SYS_NAND_BLOCK_SIZE (SZ_128K) 158237e3793SHeiko Schocher #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 159237e3793SHeiko Schocher CONFIG_SYS_NAND_PAGE_SIZE) 160237e3793SHeiko Schocher #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 161237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCSIZE 256 162237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCBYTES 3 163237e3793SHeiko Schocher #define CONFIG_SYS_NAND_OOBSIZE 64 164237e3793SHeiko Schocher #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \ 165237e3793SHeiko Schocher 48, 49, 50, 51, 52, 53, 54, 55, \ 166237e3793SHeiko Schocher 56, 57, 58, 59, 60, 61, 62, 63, } 167237e3793SHeiko Schocher 168237e3793SHeiko Schocher #define CONFIG_SPL_ATMEL_SIZE 169237e3793SHeiko Schocher #define CONFIG_SYS_MASTER_CLOCK 132096000 170237e3793SHeiko Schocher #define AT91_PLL_LOCK_TIMEOUT 1000000 171237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLA 0x202A3F01 172237e3793SHeiko Schocher #define CONFIG_SYS_MCKR 0x1300 173237e3793SHeiko Schocher #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR) 174237e3793SHeiko Schocher #define CONFIG_SYS_AT91_PLLB 0x10193F05 17540540823SHeiko Schocher 1760f8bc283SHeiko Schocher #endif 177