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/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt8192-clock.yaml56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi34 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #clock-cells = <0>;
57 #size-cells = <0>;
59 cpu0: cpu@0 {
62 reg = <0x000>;
73 performance-domains = <&performance 0>;
80 reg = <0x100>;
91 performance-domains = <&performance 0>;
98 reg = <0x200>;
[all …]
H A Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]