Searched +full:0 +full:x17020000 (Results 1 – 6 of 6) sorted by relevance
8 - #size-cells: Must be <0>.21 #size-cells = <0>;22 reg = <0x0 0x17020000 0x0 0xd100>;23 clocks = <&menetclk 0>;29 reg = <0x3>;32 reg = <0x4>;35 reg = <0x5>;
23 - port-id: Port number (0 or 1)34 - #size-cells: Must be <0>.43 Valid values are between 0 to 7, that maps to47 Valid values are between 0 to 7, that maps to64 reg = <0x0 0x17020000 0x0 0xd100>,65 <0x0 0x17030000 0x0 0x400>,66 <0x0 0x10000000 0x0 0x200>;68 interrupts = <0x0 0x3c 0x4>;69 port-id = <0>;70 clocks = <&menetclk 0>;[all …]
44 '-[0-9]+$':104 reg = <0x17020000 0x10000>;112 pwm-0 {114 pinmux = <0xff030802>;119 slew-rate = <0>;
16 #size-cells = <0>;18 cpu@0 {21 reg = <0x0 0x000>;23 cpu-release-addr = <0x1 0x0000fff8>;29 reg = <0x0 0x001>;31 cpu-release-addr = <0x1 0x0000fff8>;37 reg = <0x0 0x100>;39 cpu-release-addr = <0x1 0x0000fff8>;45 reg = <0x0 0x101>;47 cpu-release-addr = <0x1 0x0000fff8>;[all …]
20 #size-cells = <0>;22 S7_0: cpu@0 {24 reg = <0>;185 cpu_opp: opp-table-0 {245 #clock-cells = <0>;250 #clock-cells = <0>;256 #clock-cells = <0>;262 #clock-cells = <0>;268 #clock-cells = <0>;274 #clock-cells = <0>;[all …]
34 #clock-cells = <0>;43 #clock-cells = <0>;50 #clock-cells = <0>;57 #size-cells = <0>;59 cpu0: cpu@0 {62 reg = <0x000>;73 performance-domains = <&performance 0>;80 reg = <0x100>;91 performance-domains = <&performance 0>;98 reg = <0x200>;[all …]