Searched +full:0 +full:x14400 (Results 1 – 6 of 6) sorted by relevance
/openbmc/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | qcom,sm8550-rpmh.yaml | 126 clk_virt: interconnect-0 { 134 reg = <0x016e0000 0x14400>;
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/openbmc/linux/drivers/net/ethernet/wangxun/libwx/ |
H A D | wx_type.h | 12 #define WX_NCSI_SUP 0x8000 13 #define WX_NCSI_MASK 0x8000 14 #define WX_WOL_SUP 0x4000 15 #define WX_WOL_MASK 0x4000 18 #define WX_PCIE_MSIX_TBL_SZ_MASK 0x7FF 19 #define WX_PCI_LINK_STATUS 0xB2 23 #define WX_MIS_PWR 0x10000 24 #define WX_MIS_RST 0x1000C 26 #define WX_MIS_RST_SW_RST BIT(0) 27 #define WX_MIS_ST 0x10028 [all …]
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/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | intel_uncore.c | 66 uncore->debug->unclaimed_mmio_check = 0; in mmio_debug_suspend() 115 if (id >= 0 && id < FW_DOMAIN_ID_COUNT) in intel_uncore_forcewake_domain_to_str() 137 fw_clear(d, 0xefff); in fw_domain_reset() 139 fw_clear(d, 0xffff); in fw_domain_reset() 167 return __wait_for_ack(d, ack, 0); in wait_ack_clear() 183 if (fw_ack(d) == ~0) in fw_domain_wait_ack_clear() 185 "%s: MMIO unreliable (forcewake register returns 0xFFFFFFFF)!\n", in fw_domain_wait_ack_clear() 196 ACK_CLEAR = 0, 205 const u32 value = type == ACK_SET ? ack_bit : 0; in fw_domain_wait_ack_with_fallback() 238 "%s had to use fallback to %s ack, 0x%x (passes %u)\n", in fw_domain_wait_ack_with_fallback() [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sm8550.dtsi | 36 #clock-cells = <0>; 41 #clock-cells = <0>; 45 #clock-cells = <0>; 53 #clock-cells = <0>; 62 #clock-cells = <0>; 68 #size-cells = <0>; 70 CPU0: cpu@0 { 73 reg = <0 0>; 74 clocks = <&cpufreq_hw 0>; 79 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
H A D | nbio_7_2_0_offset.h | 26 // base address: 0x0 27 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000 28 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002 29 …BIF_CFG_DEV0_RC_COMMAND 0x0004 30 …BIF_CFG_DEV0_RC_STATUS 0x0006 31 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008 32 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009 33 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a 34 …BIF_CFG_DEV0_RC_BASE_CLASS 0x000b 35 …BIF_CFG_DEV0_RC_CACHE_LINE 0x000c [all …]
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H A D | nbio_7_7_0_offset.h | 29 // base address: 0x0 30 …NBCFG_SCRATCH_4 0x0078 34 // base address: 0x0 35 …BIF_CFG_DEV0_RC_VENDOR_ID 0x0000 36 …BIF_CFG_DEV0_RC_DEVICE_ID 0x0002 37 …BIF_CFG_DEV0_RC_COMMAND 0x0004 38 …BIF_CFG_DEV0_RC_STATUS 0x0006 39 …BIF_CFG_DEV0_RC_REVISION_ID 0x0008 40 …BIF_CFG_DEV0_RC_PROG_INTERFACE 0x0009 41 …BIF_CFG_DEV0_RC_SUB_CLASS 0x000a [all …]
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