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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,ovl-2l.yaml84 reg = <0 0x14009000 0 0x1000>;
89 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi22 reg = <0 0x13000000 0 0x200>;
29 reg = <0 0x13040000 0 0x30000>;
55 reg = <0 0x14000000 0 0x1000>;
62 reg = <0 0x14010000 0 0x1000>;
64 mediatek,larb-id = <0>;
74 reg = <0 0x16010000 0 0x1000>;
86 reg = <0 0x15001000 0 0x1000>;
99 reg = <0 0x15000000 0 0x1000>;
106 reg = <0 0x10205000 0 0x1000>;
117 reg = <0 0x15004000 0 0x1000>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi34 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #clock-cells = <0>;
57 #size-cells = <0>;
59 cpu0: cpu@0 {
62 reg = <0x000>;
73 performance-domains = <&performance 0>;
80 reg = <0x100>;
91 performance-domains = <&performance 0>;
98 reg = <0x200>;
[all …]
H A Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]