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Searched +full:0 +full:x1240000 (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/sound/soc/amd/renoir/
H A Drn_acp3x.h11 #define ACP_PHY_BASE_ADDRESS 0x1240000
12 #define ACP_REG_START 0x1240000
13 #define ACP_REG_END 0x1250200
15 #define ACP_DEVICE_ID 0x15E2
16 #define ACP_POWER_ON 0x00
17 #define ACP_POWER_ON_IN_PROGRESS 0x01
18 #define ACP_POWER_OFF 0x02
19 #define ACP_POWER_OFF_IN_PROGRESS 0x03
20 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
22 #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
[all …]
H A Drn_chip_offset_byte.h12 #define ACP_DMA_CNTL_0 0x1240000
13 #define ACP_DMA_CNTL_1 0x1240004
14 #define ACP_DMA_CNTL_2 0x1240008
15 #define ACP_DMA_CNTL_3 0x124000C
16 #define ACP_DMA_CNTL_4 0x1240010
17 #define ACP_DMA_CNTL_5 0x1240014
18 #define ACP_DMA_CNTL_6 0x1240018
19 #define ACP_DMA_CNTL_7 0x124001C
20 #define ACP_DMA_DSCR_STRT_IDX_0 0x1240020
21 #define ACP_DMA_DSCR_STRT_IDX_1 0x1240024
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/openbmc/linux/sound/soc/amd/yc/
H A Dacp6x.h10 #define ACP_DEVICE_ID 0x15E2
11 #define ACP6x_PHY_BASE_ADDRESS 0x1240000
12 #define ACP6x_REG_START 0x1240000
13 #define ACP6x_REG_END 0x1250200
17 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
19 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0
21 #define ACP_POWERED_ON 0
26 #define ACP_ERROR_MASK 0x20000000
27 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
28 #define PDM_DMA_STAT 0x10
[all …]
H A Dacp6x_chip_offset_byte.h12 #define ACP_DMA_CNTL_0 0x1240000
13 #define ACP_DMA_CNTL_1 0x1240004
14 #define ACP_DMA_CNTL_2 0x1240008
15 #define ACP_DMA_CNTL_3 0x124000C
16 #define ACP_DMA_CNTL_4 0x1240010
17 #define ACP_DMA_CNTL_5 0x1240014
18 #define ACP_DMA_CNTL_6 0x1240018
19 #define ACP_DMA_CNTL_7 0x124001C
20 #define ACP_DMA_DSCR_STRT_IDX_0 0x1240020
21 #define ACP_DMA_DSCR_STRT_IDX_1 0x1240024
[all …]
/openbmc/linux/sound/soc/amd/raven/
H A Dacp3x.h10 #define I2S_SP_INSTANCE 0x01
11 #define I2S_BT_INSTANCE 0x02
14 #define TDM_DISABLE 0
17 #define ACP3x_PHY_BASE_ADDRESS 0x1240000
18 #define ACP3x_I2S_MODE 0
19 #define ACP3x_REG_START 0x1240000
20 #define ACP3x_REG_END 0x1250200
21 #define ACP3x_I2STDM_REG_START 0x1242400
22 #define ACP3x_I2STDM_REG_END 0x1242410
23 #define ACP3x_BT_TDM_REG_START 0x1242800
[all …]
H A Dchip_offset_byte.h12 #define mmACP_DMA_CNTL_0 0x1240000
13 #define mmACP_DMA_CNTL_1 0x1240004
14 #define mmACP_DMA_CNTL_2 0x1240008
15 #define mmACP_DMA_CNTL_3 0x124000C
16 #define mmACP_DMA_CNTL_4 0x1240010
17 #define mmACP_DMA_CNTL_5 0x1240014
18 #define mmACP_DMA_CNTL_6 0x1240018
19 #define mmACP_DMA_CNTL_7 0x124001C
20 #define mmACP_DMA_DSCR_STRT_IDX_0 0x1240020
21 #define mmACP_DMA_DSCR_STRT_IDX_1 0x1240024
[all …]
/openbmc/linux/sound/soc/amd/vangogh/
H A Dacp5x.h11 #define ACP5x_PHY_BASE_ADDRESS 0x1240000
12 #define ACP_DEVICE_ID 0x15E2
13 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
15 #define ACP_PGFSM_CNTL_POWER_ON_MASK 0x01
16 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0x00
17 #define ACP_PGFSM_STATUS_MASK 0x03
18 #define ACP_POWERED_ON 0x00
19 #define ACP_POWER_ON_IN_PROGRESS 0x01
20 #define ACP_POWERED_OFF 0x02
21 #define ACP_POWER_OFF_IN_PROGRESS 0x03
[all …]
H A Dvg_chip_offset_byte.h12 #define ACP_DMA_CNTL_0 0x1240000
13 #define ACP_DMA_CNTL_1 0x1240004
14 #define ACP_DMA_CNTL_2 0x1240008
15 #define ACP_DMA_CNTL_3 0x124000C
16 #define ACP_DMA_CNTL_4 0x1240010
17 #define ACP_DMA_CNTL_5 0x1240014
18 #define ACP_DMA_CNTL_6 0x1240018
19 #define ACP_DMA_CNTL_7 0x124001C
20 #define ACP_DMA_DSCR_STRT_IDX_0 0x1240020
21 #define ACP_DMA_DSCR_STRT_IDX_1 0x1240024
[all …]
/openbmc/linux/sound/soc/amd/rpl/
H A Drpl_acp6x.h10 #define ACP_DEVICE_ID 0x15E2
11 #define ACP6x_PHY_BASE_ADDRESS 0x1240000
13 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
15 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0
17 #define ACP_POWERED_ON 0
/openbmc/linux/sound/soc/sof/amd/
H A Dpci-rn.c26 #define ACP3x_REG_START 0x1240000
27 #define ACP3x_REG_END 0x125C000
28 #define ACP3X_FUTURE_REG_ACLK_0 0x1860
45 .resindex_lpe_base = 0,
89 { 0, }
H A Dpci-rmb.c26 #define ACP6x_REG_START 0x1240000
27 #define ACP6x_REG_END 0x125C000
28 #define ACP6X_FUTURE_REG_ACLK_0 0x1854
44 .resindex_lpe_base = 0,
88 { 0, }
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmscc,vsc7514-switch.yaml38 "^port@[0-9a-f]+$":
55 "^port@[0-9a-f]+$":
142 reg = <0x1010000 0x10000>,
143 <0x1030000 0x10000>,
144 <0x1080000 0x100>,
145 <0x10e0000 0x10000>,
146 <0x11e0000 0x100>,
147 <0x11f0000 0x100>,
148 <0x1200000 0x100>,
149 <0x1210000 0x100>,
[all …]
/openbmc/linux/sound/soc/amd/ps/
H A Dacp63.h10 #define ACP_DEVICE_ID 0x15E2
11 #define ACP63_REG_START 0x1240000
12 #define ACP63_REG_END 0x1250200
15 #define ACP_SOFT_RESET_SOFTRESET_AUDDONE_MASK 0x00010001
17 #define ACP_PGFSM_CNTL_POWER_OFF_MASK 0
19 #define ACP_POWERED_ON 0
24 #define ACP_ERROR_MASK 0x20000000
25 #define ACP_EXT_INTR_STAT_CLEAR_MASK 0xFFFFFFFF
26 #define PDM_DMA_STAT 0x10
28 #define PDM_DMA_INTR_MASK 0x10000
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/openbmc/linux/sound/soc/amd/acp/
H A Dacp-pci.c26 #define ACP3x_REG_START 0x1240000
27 #define ACP3x_REG_END 0x125C000
34 .start = 0,
40 .start = 0,
41 .end = 0,
70 if (ret < 0) { in acp_pci_probe()
82 case 0x01: in acp_pci_probe()
86 case 0x6f: in acp_pci_probe()
91 dev_err(dev, "Unsupported device revision:0x%x\n", pci->revision); in acp_pci_probe()
96 dmic_dev = platform_device_register_data(dev, "dmic-codec", PLATFORM_DEVID_NONE, NULL, 0); in acp_pci_probe()
[all …]
/openbmc/linux/arch/mips/boot/dts/mscc/
H A Docelot.dtsi11 #size-cells = <0>;
13 cpu@0 {
17 reg = <0>;
26 #address-cells = <0>;
34 #clock-cells = <0>;
40 #clock-cells = <0>;
50 ranges = <0 0x70000000 0x2000000>;
54 cpu_ctrl: syscon@0 {
56 reg = <0x0 0x2c>;
61 reg = <0x70 0x70>;
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dmscc,ocelot.dtsi13 #size-cells = <0>;
15 cpu@0 {
19 reg = <0>;
27 cpuintc: interrupt-controller@0 {
28 #address-cells = <0>;
36 #clock-cells = <0>;
42 #clock-cells = <0>;
48 #clock-cells = <0>;
56 ranges = <0 0x70000000 0x2000000>;
60 cpu_ctrl: syscon@0 {
[all …]
/openbmc/linux/drivers/crypto/cavium/nitrox/
H A Dnitrox_csr.h21 #define EMU_BIST_STATUSX(_i) (0x1402700 + ((_i) * 0x40000))
22 #define UCD_BIST_STATUS 0x12C0070
23 #define NPS_CORE_BIST_REG 0x10000E8
24 #define NPS_CORE_NPC_BIST_REG 0x1000128
25 #define NPS_PKT_SLC_BIST_REG 0x1040088
26 #define NPS_PKT_IN_BIST_REG 0x1040100
27 #define POM_BIST_REG 0x11C0100
28 #define BMI_BIST_REG 0x1140080
29 #define EFL_CORE_BIST_REGX(_i) (0x1240100 + ((_i) * 0x400))
30 #define EFL_TOP_BIST_STAT 0x1241090
[all …]