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/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dcpu.h10 #define DEVICE_NOT_AVAILABLE 0
13 #define EXYNOS4_ADDR_BASE 0x10000000
16 #define EXYNOS4_I2C_SPACING 0x10000
18 #define EXYNOS4_GPIO_PART3_BASE 0x03860000
19 #define EXYNOS4_PRO_ID 0x10000000
20 #define EXYNOS4_SYSREG_BASE 0x10010000
21 #define EXYNOS4_POWER_BASE 0x10020000
22 #define EXYNOS4_SWRESET 0x10020400
23 #define EXYNOS4_CLOCK_BASE 0x10030000
24 #define EXYNOS4_SYSTIMER_BASE 0x10050000
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dsynopsys-dw-mshc.yaml80 reg = <0x12200000 0x1000>;
81 interrupts = <0 75 0>;
90 #size-cells = <0>;
98 data-addr = <0x200>;
99 fifo-depth = <0x80>;
/openbmc/u-boot/arch/arm/dts/
H A Dexynos5.dtsi20 reg = <0x10440000 0x1000>;
21 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
22 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
23 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
24 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
25 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
26 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
27 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
28 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
35 reg = <0x10481000 0x1000>,
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5410.dtsi31 #size-cells = <0>;
33 cpu0: cpu@0 {
36 reg = <0x0>;
43 reg = <0x1>;
50 reg = <0x2>;
57 reg = <0x3>;
70 reg = <0x10040000 0x5000>;
78 reg = <0x10010000 0x30000>;
84 reg = <0x03810000 0x0c>;
92 reg = <0x10060000 0x100>;
[all …]
H A Dexynos5250.dtsi47 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
80 cpu0_opp_table: opp-table-0 {
176 reg = <0x02020000 0x30000>;
179 ranges = <0 0x02020000 0x30000>;
181 smp-sram@0 {
183 reg = <0x0 0x1000>;
188 reg = <0x2f000 0x1000>;
194 reg = <0x10044000 0x20>;
[all …]
H A Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x1000>;
287 reg = <0x10010000 0x30000>;
293 reg = <0x03810000 0x0c>;
303 reg = <0x11000000 0x10000>;
316 #size-cells = <0>;
317 reg = <0x12200000 0x2000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8660.dtsi18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0>;
45 reg = <0x0 0x0>;
50 interrupts = <1 9 0x304>;
56 #clock-cells = <0>;
63 #clock-cells = <0>;
70 #clock-cells = <0>;
83 io-channels = <&pm8058_xoadc 0x00 0x01>, /* Battery */
84 <&pm8058_xoadc 0x00 0x02>, /* DC in (charger) */
[all …]
/openbmc/qemu/hw/arm/
H A Daspeed_ast27x0.c27 [ASPEED_DEV_SPI_BOOT] = 0x400000000,
28 [ASPEED_DEV_SRAM] = 0x10000000,
29 [ASPEED_DEV_SDMC] = 0x12C00000,
30 [ASPEED_DEV_SCU] = 0x12C02000,
31 [ASPEED_DEV_SCUIO] = 0x14C02000,
32 [ASPEED_DEV_UART0] = 0X14C33000,
33 [ASPEED_DEV_UART1] = 0X14C33100,
34 [ASPEED_DEV_UART2] = 0X14C33200,
35 [ASPEED_DEV_UART3] = 0X14C33300,
36 [ASPEED_DEV_UART4] = 0X12C1A000,
[all …]