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/openbmc/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt8192-clock.yaml56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt7981-pinctrl.yaml85 "wa_aice1" "wa_aice" 0, 1
86 "wa_aice2" "wa_aice" 0, 1
87 "wm_uart_0" "uart" 0, 1
88 "dfd" "dfd" 0, 1, 4, 5
388 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
391 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
392 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
393 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
396 enum: [0, 1, 2, 3]
400 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
[all …]
H A Dmediatek,mt7986-pinctrl.yaml86 "watchdog" "watchdog" 0
334 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
337 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
338 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
339 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
342 enum: [0, 1, 2, 3]
346 Valid arguments for 'mediatek,pull-up-adv' are '0', '1', '2', '3'
349 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled.
350 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled.
351 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled.
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi21 #size-cells = <0>;
22 cpu0: cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
58 #clock-cells = <0>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
[all …]
H A Dmt8192.dtsi34 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #clock-cells = <0>;
57 #size-cells = <0>;
59 cpu0: cpu@0 {
62 reg = <0x000>;
73 performance-domains = <&performance 0>;
80 reg = <0x100>;
91 performance-domains = <&performance 0>;
98 reg = <0x200>;
[all …]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x1000>;
287 reg = <0x10010000 0x30000>;
293 reg = <0x03810000 0x0c>;
303 reg = <0x11000000 0x10000>;
316 #size-cells = <0>;
317 reg = <0x12200000 0x2000>;
[all …]
/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt7986.c11 #define MT7986_PIN(_number, _name) MTK_PIN(_number, _name, 0, _number, DRV_GRP4)
17 _x_bits, 32, 0)
23 * iocfg_rt:0x11c30000, iocfg_rb:0x11c40000, iocfg_lt:0x11e20000,
24 * iocfg_lb:0x11e30000, iocfg_tr:0x11f00000, iocfg_tl:0x11f10000,
76 PIN_FIELD(0, 100, 0x300, 0x10, 0, 4),
80 PIN_FIELD(0, 100, 0x0, 0x10, 0, 1),
84 PIN_FIELD(0, 100, 0x200, 0x10, 0, 1),
88 PIN_FIELD(0, 100, 0x100, 0x10, 0, 1),
92 PIN_FIELD_BASE(0, 0, IOCFG_RB_BASE, 0x40, 0x10, 17, 1),
93 PIN_FIELD_BASE(1, 2, IOCFG_LT_BASE, 0x20, 0x10, 10, 1),
[all …]