Lines Matching +full:0 +full:x11f10000
34 #clock-cells = <0>;
43 #clock-cells = <0>;
50 #clock-cells = <0>;
57 #size-cells = <0>;
59 cpu0: cpu@0 {
62 reg = <0x000>;
73 performance-domains = <&performance 0>;
80 reg = <0x100>;
91 performance-domains = <&performance 0>;
98 reg = <0x200>;
109 performance-domains = <&performance 0>;
116 reg = <0x300>;
127 performance-domains = <&performance 0>;
134 reg = <0x400>;
152 reg = <0x500>;
170 reg = <0x600>;
188 reg = <0x700>;
265 arm,psci-suspend-param = <0x00010001>;
273 arm,psci-suspend-param = <0x00010001>;
281 arm,psci-suspend-param = <0x01010002>;
289 arm,psci-suspend-param = <0x01010002>;
318 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
319 <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH 0>,
320 <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH 0>,
321 <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
325 gpu_opp_table: opp-table-0 {
414 dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
419 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
429 reg = <0 0x0c000000 0 0x40000>,
430 <0 0x0c040000 0 0x200000>;
431 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
434 ppi_cluster0: interrupt-partition-0 {
445 reg = <0 0x10000000 0 0x1000>;
451 reg = <0 0x10001000 0 0x1000>;
458 reg = <0 0x10003000 0 0x1000>;
464 reg = <0 0x10005000 0 0x1000>,
465 <0 0x11c20000 0 0x1000>,
466 <0 0x11d10000 0 0x1000>,
467 <0 0x11d30000 0 0x1000>,
468 <0 0x11d40000 0 0x1000>,
469 <0 0x11e20000 0 0x1000>,
470 <0 0x11e70000 0 0x1000>,
471 <0 0x11ea0000 0 0x1000>,
472 <0 0x11f20000 0 0x1000>,
473 <0 0x11f30000 0 0x1000>,
474 <0 0x1000b000 0 0x1000>;
481 gpio-ranges = <&pio 0 0 220>;
483 interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
489 reg = <0 0x10006000 0 0x1000>;
495 #size-cells = <0>;
506 #power-domain-cells = <0>;
514 #power-domain-cells = <0>;
523 #size-cells = <0>;
530 #size-cells = <0>;
535 #power-domain-cells = <0>;
540 #power-domain-cells = <0>;
545 #power-domain-cells = <0>;
550 #power-domain-cells = <0>;
555 #power-domain-cells = <0>;
567 clock-names = "disp", "disp-0", "disp-1", "disp-2",
571 #size-cells = <0>;
581 clock-names = "ipe", "ipe-0", "ipe-1", "ipe-2",
584 #power-domain-cells = <0>;
592 clock-names = "isp", "isp-0", "isp-1";
594 #power-domain-cells = <0>;
602 clock-names = "isp2", "isp2-0", "isp2-1";
604 #power-domain-cells = <0>;
611 clock-names = "mdp", "mdp-0";
613 #power-domain-cells = <0>;
620 clock-names = "venc", "venc-0";
622 #power-domain-cells = <0>;
631 clock-names = "vdec", "vdec-0", "vdec-1", "vdec-2";
634 #size-cells = <0>;
642 clock-names = "vdec2-0", "vdec2-1",
644 #power-domain-cells = <0>;
655 clock-names = "cam", "cam-0", "cam-1", "cam-2",
659 #size-cells = <0>;
665 clock-names = "cam_rawa-0";
666 #power-domain-cells = <0>;
672 clock-names = "cam_rawb-0";
673 #power-domain-cells = <0>;
679 clock-names = "cam_rawc-0";
680 #power-domain-cells = <0>;
689 reg = <0 0x10007000 0 0x100>;
695 reg = <0 0x1000c000 0 0x1000>;
702 reg = <0 0x10017000 0 0x1000>;
703 interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH 0>;
709 reg = <0 0x10026000 0 0x1000>;
711 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 0>;
721 reg = <0 0x10027000 0 0x000e00>,
722 <0 0x10029000 0 0x000100>;
736 reg = <0 0x10228000 0 0x4000>;
737 interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 0>;
745 reg = <0 0x10720000 0 0x1000>;
754 reg = <0 0x11002000 0 0x1000>;
755 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
764 reg = <0 0x11003000 0 0x1000>;
765 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 0>;
773 reg = <0 0x11007000 0 0x1000>;
781 #size-cells = <0>;
782 reg = <0 0x1100a000 0 0x1000>;
783 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH 0>;
793 reg = <0 0x1100e000 0 0x1000>;
794 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH 0>;
806 #size-cells = <0>;
807 reg = <0 0x11010000 0 0x1000>;
808 interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH 0>;
820 #size-cells = <0>;
821 reg = <0 0x11012000 0 0x1000>;
822 interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH 0>;
834 #size-cells = <0>;
835 reg = <0 0x11013000 0 0x1000>;
836 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH 0>;
848 #size-cells = <0>;
849 reg = <0 0x11018000 0 0x1000>;
850 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH 0>;
862 #size-cells = <0>;
863 reg = <0 0x11019000 0 0x1000>;
864 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH 0>;
876 #size-cells = <0>;
877 reg = <0 0x1101d000 0 0x1000>;
878 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH 0>;
890 #size-cells = <0>;
891 reg = <0 0x1101e000 0 0x1000>;
892 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH 0>;
902 reg = <0 0x10500000 0 0x100000>,
903 <0 0x10720000 0 0xe0000>,
904 <0 0x10700000 0 0x8000>;
906 interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH 0>;
915 reg = <0 0x11200000 0 0x1000>,
916 <0 0x11203e00 0 0x0100>;
918 interrupts-extended = <&gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH 0>;
934 mediatek,syscon-wakeup = <&pericfg 0x420 102>;
940 reg = <0 0x11210000 0 0x2000>;
945 interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 0>;
1070 reg = <0 0x11230000 0 0x2000>;
1084 interrupts = <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH 0>;
1085 bus-range = <0x00 0xff>;
1086 ranges = <0x82000000 0 0x12000000 0x0 0x12000000 0 0x0800000>,
1087 <0x81000000 0 0x12800000 0x0 0x12800000 0 0x0800000>;
1089 interrupt-map-mask = <0 0 0 7>;
1090 interrupt-map = <0 0 0 1 &pcie_intc0 0>,
1091 <0 0 0 2 &pcie_intc0 1>,
1092 <0 0 0 3 &pcie_intc0 2>,
1093 <0 0 0 4 &pcie_intc0 3>;
1097 #address-cells = <0>;
1104 reg = <0 0x11234000 0 0xe0>;
1105 interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
1113 #size-cells = <0>;
1119 reg = <0 0x11c10000 0 0x1000>;
1124 reg = <0x1c0 0x58>;
1128 reg = <0x580 0x68>;
1134 reg = <0 0x11cb0000 0 0x1000>,
1135 <0 0x10217300 0 0x80>;
1136 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>;
1142 #size-cells = <0>;
1148 reg = <0 0x11cb1000 0 0x1000>;
1154 reg = <0 0x11d00000 0 0x1000>,
1155 <0 0x10217600 0 0x180>;
1156 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>;
1162 #size-cells = <0>;
1168 reg = <0 0x11d01000 0 0x1000>,
1169 <0 0x10217780 0 0x180>;
1170 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH 0>;
1176 #size-cells = <0>;
1182 reg = <0 0x11d02000 0 0x1000>,
1183 <0 0x10217900 0 0x180>;
1184 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH 0>;
1190 #size-cells = <0>;
1196 reg = <0 0x11d03000 0 0x1000>;
1202 reg = <0 0x11d20000 0 0x1000>,
1203 <0 0x10217100 0 0x80>;
1204 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>;
1210 #size-cells = <0>;
1216 reg = <0 0x11d21000 0 0x1000>,
1217 <0 0x10217180 0 0x180>;
1218 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>;
1224 #size-cells = <0>;
1230 reg = <0 0x11d22000 0 0x1000>,
1231 <0 0x10217380 0 0x180>;
1232 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
1238 #size-cells = <0>;
1244 reg = <0 0x11d23000 0 0x1000>;
1250 reg = <0 0x11e00000 0 0x1000>,
1251 <0 0x10217500 0 0x80>;
1252 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>;
1258 #size-cells = <0>;
1264 reg = <0 0x11e01000 0 0x1000>;
1273 ranges = <0x0 0x0 0x11e40000 0x1000>;
1275 u2port0: usb-phy@0 {
1276 reg = <0x0 0x700>;
1283 reg = <0x700 0x900>;
1292 reg = <0 0x11e50000 0 0x1000>;
1294 #clock-cells = <0>;
1295 #phy-cells = <0>;
1302 reg = <0 0x11f00000 0 0x1000>,
1303 <0 0x10217080 0 0x80>;
1304 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;
1310 #size-cells = <0>;
1316 reg = <0 0x11f01000 0 0x1000>,
1317 <0 0x10217580 0 0x80>;
1318 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>;
1324 #size-cells = <0>;
1330 reg = <0 0x11f02000 0 0x1000>;
1336 reg = <0 0x11f10000 0 0x1000>;
1342 reg = <0 0x11f60000 0 0x1000>, <0 0x11f50000 0 0x1000>;
1343 interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH 0>;
1358 reg = <0 0x11f70000 0 0x1000>, <0 0x11c70000 0 0x1000>;
1359 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>;
1374 reg = <0 0x13000000 0 0x4000>;
1375 interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH 0>,
1376 <GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH 0>,
1377 <GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH 0>;
1396 reg = <0 0x13fbf000 0 0x1000>;
1402 reg = <0 0x14000000 0 0x1000>;
1405 mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
1407 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
1412 reg = <0 0x14001000 0 0x1000>;
1413 interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH 0>;
1415 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x1000 0x1000>;
1423 reg = <0 0x14002000 0 0x1000>;
1434 reg = <0 0x14003000 0 0x1000>;
1435 mediatek,larb-id = <0>;
1444 reg = <0 0x14004000 0 0x1000>;
1454 reg = <0 0x14005000 0 0x1000>;
1455 interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH 0>;
1460 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x5000 0x1000>;
1465 reg = <0 0x14006000 0 0x1000>;
1466 interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH 0>;
1471 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x6000 0x1000>;
1477 reg = <0 0x14007000 0 0x1000>;
1478 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH 0>;
1483 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x7000 0x1000>;
1489 reg = <0 0x14009000 0 0x1000>;
1490 interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH 0>;
1493 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x9000 0x1000>;
1498 reg = <0 0x1400a000 0 0x1000>;
1499 interrupts = <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH 0>;
1502 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xa000 0x1000>;
1508 reg = <0 0x1400b000 0 0x1000>;
1509 interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH 0>;
1512 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xb000 0x1000>;
1518 reg = <0 0x1400c000 0 0x1000>;
1519 interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH 0>;
1522 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xc000 0x1000>;
1527 reg = <0 0x1400d000 0 0x1000>;
1528 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH 0>;
1531 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xd000 0x1000>;
1537 reg = <0 0x1400e000 0 0x1000>;
1538 interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH 0>;
1541 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0xe000 0x1000>;
1546 reg = <0 0x14010000 0 0x1000>;
1547 interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH 0>;
1565 reg = <0 0x14014000 0 0x1000>;
1566 interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH 0>;
1571 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x4000 0x1000>;
1577 reg = <0 0x14015000 0 0x1000>;
1578 interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH 0>;
1583 mediatek,gce-client-reg = <&gce SUBSYS_1401XXXX 0x5000 0x1000>;
1588 reg = <0 0x14016000 0 0x1000>;
1589 interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH 0>;
1599 reg = <0 0x1401d000 0 0x1000>;
1605 interrupts = <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH 0>;
1614 reg = <0 0x15020000 0 0x1000>;
1620 reg = <0 0x1502e000 0 0x1000>;
1631 reg = <0 0x15820000 0 0x1000>;
1637 reg = <0 0x1582e000 0 0x1000>;
1648 reg = <0 0x16000000 0 0x1000>;
1653 ranges = <0 0 0 0x16000000 0 0x26000>;
1657 reg = <0x0 0x10000 0 0x800>;
1658 interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>;
1680 reg = <0 0x25000 0 0x1000>;
1681 interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>;
1707 reg = <0 0x1600d000 0 0x1000>;
1718 reg = <0 0x1600f000 0 0x1000>;
1724 reg = <0 0x1602e000 0 0x1000>;
1735 reg = <0 0x1602f000 0 0x1000>;
1741 reg = <0 0x17000000 0 0x1000>;
1747 reg = <0 0x17010000 0 0x1000>;
1758 reg = <0 0x17020000 0 0x2000>;
1770 interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 0>;
1781 reg = <0 0x1a000000 0 0x1000>;
1787 reg = <0 0x1a001000 0 0x1000>;
1798 reg = <0 0x1a002000 0 0x1000>;
1809 reg = <0 0x1a00f000 0 0x1000>;
1820 reg = <0 0x1a010000 0 0x1000>;
1831 reg = <0 0x1a011000 0 0x1000>;
1842 reg = <0 0x1a04f000 0 0x1000>;
1848 reg = <0 0x1a06f000 0 0x1000>;
1854 reg = <0 0x1a08f000 0 0x1000>;
1860 reg = <0 0x1b000000 0 0x1000>;
1866 reg = <0 0x1b00f000 0 0x1000>;
1877 reg = <0 0x1b10f000 0 0x1000>;
1888 reg = <0 0x1f000000 0 0x1000>;
1894 reg = <0 0x1f002000 0 0x1000>;