Searched +full:0 +full:x10830400 (Results 1 – 7 of 7) sorted by relevance
42 reg = <0x10830400 0x200>;
61 port@0:89 - port@0112 reg = <0x10830400 0xfc00>;125 #size-cells = <0>;127 port@0 {128 reg = <0>;131 clock-lanes = <0>;139 #size-cells = <0>;143 csi2cru: endpoint@0 {144 reg = <0>;
40 reg = <0x10000000 0x100>;45 reg = <0x12250000 0x14>;53 reg = <0x10440000 0x1000>;54 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,92 reg = <0x10481000 0x1000>,93 <0x10482000 0x2000>,94 <0x10484000 0x2000>,95 <0x10486000 0x2000>;102 reg = <0x10050000 0x5000>;107 reg = <0x12c00000 0x100>;[all …]
68 reg = <0x03810000 0x0c>;79 reg = <0x03830000 0x100>;88 samsung,idma-addr = <0x03000000>;95 reg = <0x10000000 0x100>;100 reg = <0x10500000 0x2000>;105 reg = <0x12570000 0x14>;110 reg = <0x10023c40 0x20>;111 #power-domain-cells = <0>;117 reg = <0x10023c60 0x20>;118 #power-domain-cells = <0>;[all …]
41 #define EXYNOS4210_CHIPID_ADDR 0x1000000044 #define EXYNOS4210_PWM_BASE_ADDR 0x139D000047 #define EXYNOS4210_RTC_BASE_ADDR 0x1007000050 #define EXYNOS4210_MCT_BASE_ADDR 0x1005000053 #define EXYNOS4210_I2C_SHIFT 0x0001000054 #define EXYNOS4210_I2C_BASE_ADDR 0x1386000060 #define EXYNOS4210_UART0_BASE_ADDR 0x1380000061 #define EXYNOS4210_UART1_BASE_ADDR 0x1381000062 #define EXYNOS4210_UART2_BASE_ADDR 0x1382000063 #define EXYNOS4210_UART3_BASE_ADDR 0x13830000[all …]
18 #clock-cells = <0>;20 clock-frequency = <0>;25 #clock-cells = <0>;27 clock-frequency = <0>;33 #clock-cells = <0>;34 clock-frequency = <0>;40 #clock-cells = <0>;42 clock-frequency = <0>;45 cluster0_opp: opp-table-0 {74 #size-cells = <0>;[all …]