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/openbmc/u-boot/include/configs/
H A Dtbs2910.h37 #define CONFIG_SYS_BOOTMAPSZ 0x10000000
77 #define CONFIG_DWC_AHSATA_PORT_ID 0
128 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
130 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
131 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
133 "${bootargs_mmc3}\0" \
135 "rdinit=/sbin/init enable_wait_mode=off\0" \
137 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
138 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
139 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
[all …]
H A Del6x_common.h28 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
43 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
54 "board="__stringify(CONFIG_BOARD_NAME)"\0" \
55 "cma_size="__stringify(EL6Q_CMA_SIZE)"\0" \
56 "chp_size="__stringify(EL6Q_COHERENT_POOL_SIZE)"\0" \
57 "console=" CONSOLE_DEV "\0" \
58 "fdtfile=undefined\0" \
59 "fdt_high=0xffffffff\0" \
60 "fdt_addr_r=0x18000000\0" \
61 "fdt_addr=0x18000000\0" \
[all …]
H A Dsecomx6quq7.h21 #define CONFIG_SYS_MEMTEST_START 0x10000000
26 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
36 "netdev=eth0\0" \
37 "ethprime=FEC0\0" \
38 "netdev=eth0\0" \
39 "ethprime=FEC0\0" \
40 "uboot=u-boot.bin\0" \
41 "kernel=uImage\0" \
42 "nfsroot=/opt/eldk/arm\0" \
43 "ip_local=10.0.0.5::10.0.0.1:255.255.255.0::eth0:off\0" \
[all …]
H A Dembestmx6boards.h39 #define CONFIG_MXC_USB_FLAGS 0
42 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
54 #define CONFIG_SYS_MEMTEST_START 0x10000000
55 #define CONFIG_SYS_MEMTEST_END 0x10010000
56 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
104 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
108 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0 /* offset 69KB */
109 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0 /* offset 69KB */
110 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
117 "bootm_size=0x10000000\0" \
[all …]
H A Dnitrogen6x.h35 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
43 #define CONFIG_DWC_AHSATA_PORT_ID 0
58 #define CONFIG_MXC_USB_FLAGS 0
74 #define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1)
80 #define DISTRO_BOOT_DEV_SATA(func) func(SATA, sata, 0)
86 #define DISTRO_BOOT_DEV_USB(func) func(USB, usb, 0)
105 #define FDTFILE "fdtfile=imx6q-sabrelite.dtb\0"
121 "console=ttymxc1\0" \
122 "fdt_high=0xffffffff\0" \
123 "initrd_high=0xffffffff\0" \
[all …]
H A Ddh_imx6.h17 * 0x00_0000-0x00_ffff ... U-Boot SPL
18 * 0x01_0000-0x0f_ffff ... U-Boot
19 * 0x10_0000-0x10_ffff ... U-Boot env #1
20 * 0x11_0000-0x11_ffff ... U-Boot env #2
21 * 0x12_0000-0x1f_ffff ... UNUSED
26 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x11400
48 #define CONFIG_FEC_MXC_PHYADDR 0
66 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
73 #define CONFIG_DWC_AHSATA_PORT_ID 0
91 #define CONFIG_MXC_USB_FLAGS 0
[all …]
H A Dplatinum.h34 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44 #define CONFIG_MXC_USB_FLAGS 0
70 #define CONFIG_SYS_NAND_BASE 0x40000000
88 #define CONFIG_SYS_MMC_ENV_DEV 0
115 "setubipartition=env set ubipartition ubi\0" \
116 "setubirfs=env set ubirfs $ubipartition:rootfs$boot_vol\0"
119 "setubipartition=env set ubipartition ubi$boot_vol\0" \
120 "setubirfs=env set ubirfs ubi0:rootfs\0"
124 "user=user\0" \
125 "project="CONFIG_PLATINUM_PROJECT"\0" \
[all …]
H A Dge_bx50v3.h43 #define CONFIG_DWC_AHSATA_PORT_ID 0
50 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
57 #define CONFIG_MXC_USB_FLAGS 0
78 #define CONFIG_LOADADDR 0x12000000
81 "bootcause=POR\0" \
82 "image=/boot/fitImage\0" \
83 "fdt_high=0xffffffff\0" \
84 "dev=mmc\0" \
85 "devnum=1\0" \
86 "rootdev=mmcblk0p\0" \
[all …]
H A Daristainetos-common.h26 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
31 #define CONFIG_FEC_MXC_PHYADDR 0
37 "script=u-boot.scr\0" \
38 "fit_file=/boot/system.itb\0" \
39 "loadaddr=0x12000000\0" \
40 "fit_addr_r=0x14000000\0" \
41 "uboot=/boot/u-boot.imx\0" \
42 "uboot_sz=d0000\0" \
43 "rescue_sys_addr=f0000\0" \
44 "rescue_sys_length=f10000\0" \
[all …]
H A Dcgtqmx6eval.h31 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
52 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
57 #define CONFIG_MXC_USB_FLAGS 0
74 #define CONFIG_DWC_AHSATA_PORT_ID 0
91 #define CONFIG_SYS_MMC_ENV_DEV 0
94 "script=boot.scr\0" \
95 "image=zImage\0" \
96 "fdtfile=undefined\0" \
97 "fdt_addr_r=0x18000000\0" \
98 "boot_fdt=try\0" \
[all …]
H A Dmx6sabre_common.h21 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
33 "emmcdev=2\0" \
42 "setexpr fw_sz ${filesize} / 0x200; " \
44 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
46 "fi\0"
52 "script=boot.scr\0" \
53 "image=zImage\0" \
54 "fdt_file=undefined\0" \
55 "fdt_addr=0x18000000\0" \
56 "boot_fdt=try\0" \
[all …]
H A Dimx6_logic.h24 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
31 #define CONFIG_FEC_MXC_PHYADDR 0
34 "script=boot.scr\0" \
35 "image=zImage\0" \
36 "bootm_size=0x10000000\0" \
37 "fdt_addr_r=0x13000000\0" \
38 "ramdisk_addr_r=0x14000000\0" \
39 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
40 "ramdisk_file=rootfs.cpio.uboot\0" \
41 "boot_fdt=try\0" \
[all …]
H A Dxilinx_zynqmp.h19 #define GICD_BASE 0xF9010000
20 #define GICC_BASE 0xF9020000
23 # define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
26 #define CONFIG_SYS_MEMTEST_START 0
37 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 0x2000000)
64 #define CONFIG_SYS_LOAD_ADDR 0x8000000
67 #define CONFIG_SYS_DFU_DATA_BUF_SIZE 0x1800000
75 "system.dtb ram $fdt_addr $fdt_size\0" \
76 "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
77 "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"
[all …]
H A Dadvantech_dms-ba16.h41 #define CONFIG_DWC_AHSATA_PORT_ID 0
47 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
53 #define CONFIG_MXC_USB_FLAGS 0
70 #define CONFIG_LOADADDR 0x12000000
73 "script=boot.scr\0" \
74 "image=" CONFIG_BOOT_DIR "/uImage\0" \
75 "uboot=u-boot.imx\0" \
76 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
77 "fdt_addr=0x18000000\0" \
78 "boot_fdt=yes\0" \
[all …]
H A Dcolibri_imx6.h49 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
69 #define CONFIG_MXC_USB_FLAGS 0
104 #define CONFIG_LOADADDR 0x12000000
115 "u-boot.imx raw 0x2 0x3ff mmcpart 0;" \
116 "boot part 0 1;" \
117 "rootfs part 0 2;" \
118 "uImage fat 0 1;" \
119 "imx6q-colibri-eval-v3.dtb fat 0 1;" \
120 "imx6q-colibri-cam-eval-v3.dtb fat 0 1"
124 "rootwait\0" \
[all …]
/openbmc/u-boot/board/boundary/nitrogen6x/
H A DREADME.mx6qsabrelite40 Note: This writes SD card loader at address 0
50 MX6Q SABRELITE U-Boot > mmc dev 0
51 MX6Q SABRELITE U-Boot > mmc read 0x10800000 0 200
53 MX6Q SABRELITE U-Boot > sf erase 0 0x40000
54 MX6Q SABRELITE U-Boot > sf write 0x10800000 0 0x40000
82 => mmc dev 0
83 => mmc read 0x10800000 0x400 0x80000
84 => sf probe 0
85 => sf erase 0 0xc0000
86 => sf write 0x10800000 0x400 0x80000
/openbmc/u-boot/doc/SPI/
H A DREADME.ftssp010_spi_test13 MMC: ftsdc010: 0
19 Net: FTGMAC100#0
20 Hit any key to stop autoboot: 0
21 => sf probe 0:0
23 => sf read 0x10800000 0 0x400
24 SF: 1024 bytes @ 0x0 Read: OK
25 => md 0x10800000
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Dst,m48t86.yaml35 reg = <0x10800000 0x1>, <0x11700000 0x1>;
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,keystone-rproc.txt121 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
130 reg = <0x10800000 0x00100000>,
131 <0x10e00000 0x00008000>,
132 <0x10f00000 0x00008000>;
135 ti,syscon-dev = <&devctrl 0x40>;
136 resets = <&pscrst 0>;
138 interrupts = <0 8>;
140 kick-gpios = <&dspgpio0 27 0>;
160 reg = <0x00000008 0x1f800000 0x00000000 0x800000>;
169 reg = <0x10800000 0x00100000>,
[all …]
/openbmc/linux/arch/sparc/kernel/
H A Djump_label.c25 if (off <= 0xfffff && off >= -0x100000) in arch_jump_label_transform()
31 val = 0x10680000 | (((u32) off >> 2) & 0x7ffff); in arch_jump_label_transform()
34 BUG_ON(off > 0x7fffff); in arch_jump_label_transform()
35 BUG_ON(off < -0x800000); in arch_jump_label_transform()
37 val = 0x10800000 | (((u32) off >> 2) & 0x3fffff); in arch_jump_label_transform()
40 val = 0x01000000; in arch_jump_label_transform()
/openbmc/u-boot/doc/imx/habv4/guides/
H A Dencrypted_boot.txt29 example: dek_blob 0x10800000 0x10801000 192
37 objcopy -I binary -O binary --pad-to <blob_dst> --gap-fill=0x00 \
/openbmc/linux/Documentation/devicetree/bindings/dsp/
H A Dmediatek,mt8186-dsp.yaml81 reg = <0x10680000 0x2000>,
82 <0x10800000 0x100000>,
83 <0x1068b000 0x100>,
84 <0x1068f000 0x1000>;
/openbmc/u-boot/arch/arm/dts/
H A Dexynos4x12.dtsi34 reg = <0x10023CA0 0x20>;
39 reg = <0x10030000 0x20000>;
45 reg = <0x10050000 0x800>;
47 interrupts = <0>, <1>, <2>, <3>, <4>;
53 #address-cells = <0>;
54 #size-cells = <0>;
55 interrupt-map = <0 &gic 0 57 0>,
59 <4 &gic 1 12 0>;
65 reg = <0x11400000 0x1000>;
67 interrupts = <0 47 0>;
[all …]
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dtraps.h20 #define SPARC_MOV_CONST_L3(const) (0xa6102000 | (const&0xfff))
27 (0x10800000 | (((dest_addr-inst_addr)>>2)&0x3fffff))
29 #define SPARC_RD_PSR_L0 (0xa1480000)
30 #define SPARC_RD_WIM_L3 (0xa7500000)
31 #define SPARC_NOP (0x01000000)
35 #define SP_TRAP_TFLT 0x1 /* Text fault */
36 #define SP_TRAP_II 0x2 /* Illegal Instruction */
37 #define SP_TRAP_PI 0x3 /* Privileged Instruction */
38 #define SP_TRAP_FPD 0x4 /* Floating Point Disabled */
39 #define SP_TRAP_WOVF 0x5 /* Window Overflow */
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2e.dtsi16 #size-cells = <0>;
20 cpu@0 {
23 reg = <0>;
64 reg = <0x2620750 24>;
72 reg = <0x25000000 0x10000>;
83 reg = <0x25010000 0x70000>;
91 reg = <0x0c000000 0x200000>;
92 ranges = <0x0 0x0c000000 0x200000>;
97 reg = <0x001f0000 0x8000>;
107 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
[all …]

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