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/openbmc/linux/include/linux/mtd/
H A Ddoc2000.h17 #define DoC_Sig1 0
20 #define DoC_ChipID 0x1000
21 #define DoC_DOCStatus 0x1001
22 #define DoC_DOCControl 0x1002
23 #define DoC_FloorSelect 0x1003
24 #define DoC_CDSNControl 0x1004
25 #define DoC_CDSNDeviceSelect 0x1005
26 #define DoC_ECCConf 0x1006
27 #define DoC_2k_ECCStatus 0x1007
29 #define DoC_CDSNSlowIO 0x100d
[all …]
/openbmc/qemu/hw/riscv/
H A Dsifive_e.c8 * 0) UART
15 * The Mask ROM reset vector jumps to the flash payload at 0x2040_0000.
52 [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 },
53 [SIFIVE_E_DEV_MROM] = { 0x1000, 0x2000 },
54 [SIFIVE_E_DEV_OTP] = { 0x20000, 0x2000 },
55 [SIFIVE_E_DEV_CLINT] = { 0x2000000, 0x10000 },
56 [SIFIVE_E_DEV_PLIC] = { 0xc000000, 0x4000000 },
57 [SIFIVE_E_DEV_AON] = { 0x10000000, 0x8000 },
58 [SIFIVE_E_DEV_PRCI] = { 0x10008000, 0x8000 },
59 [SIFIVE_E_DEV_OTP_CTRL] = { 0x10010000, 0x1000 },
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_hw_sequencer.c33 #define NUM_ELEMENTS(a) (sizeof(a) / sizeof((a)[0]))
37 BLACK_COLOR_FORMAT_RGB_FULLRANGE = 0,
58 {0, 0, 0},
60 {0x40, 0x40, 0x40},
62 {0x200, 0x40, 0x200},
64 {0x1f4, 0x40, 0x1f4},
66 {0x1a2, 0x20, 0x1a2},
68 {0xff, 0xff, 0},
78 { 0x2000, 0, 0, 0,
79 0, 0x2000, 0, 0,
[all …]
/openbmc/linux/tools/arch/x86/include/uapi/asm/
H A Dprctl.h5 #define ARCH_SET_GS 0x1001
6 #define ARCH_SET_FS 0x1002
7 #define ARCH_GET_FS 0x1003
8 #define ARCH_GET_GS 0x1004
10 #define ARCH_GET_CPUID 0x1011
11 #define ARCH_SET_CPUID 0x1012
13 #define ARCH_GET_XCOMP_SUPP 0x1021
14 #define ARCH_GET_XCOMP_PERM 0x1022
15 #define ARCH_REQ_XCOMP_PERM 0x1023
16 #define ARCH_GET_XCOMP_GUEST_PERM 0x1024
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-armada100/
H A Dcpu.h19 u8 pad0[0x08 - 0x00];
20 u32 fccr; /*0x0008*/
21 u32 pocr; /*0x000c*/
22 u32 posr; /*0x0010*/
23 u32 succr; /*0x0014*/
24 u8 pad1[0x030 - 0x014 - 4];
25 u32 gpcr; /*0x0030*/
26 u8 pad2[0x200 - 0x030 - 4];
27 u32 wdtpcr; /*0x0200*/
28 u8 pad3[0x1000 - 0x200 - 4];
[all …]
/openbmc/u-boot/include/linux/mtd/
H A Ddoc2000.h16 #if 0
20 #define DoC_Sig1 0
23 #define DoC_ChipID 0x1000
24 #define DoC_DOCStatus 0x1001
25 #define DoC_DOCControl 0x1002
26 #define DoC_FloorSelect 0x1003
27 #define DoC_CDSNControl 0x1004
28 #define DoC_CDSNDeviceSelect 0x1005
29 #define DoC_ECCConf 0x1006
30 #define DoC_2k_ECCStatus 0x1007
[all …]
/openbmc/linux/arch/x86/include/uapi/asm/
H A Dprctl.h5 #define ARCH_SET_GS 0x1001
6 #define ARCH_SET_FS 0x1002
7 #define ARCH_GET_FS 0x1003
8 #define ARCH_GET_GS 0x1004
10 #define ARCH_GET_CPUID 0x1011
11 #define ARCH_SET_CPUID 0x1012
13 #define ARCH_GET_XCOMP_SUPP 0x1021
14 #define ARCH_GET_XCOMP_PERM 0x1022
15 #define ARCH_REQ_XCOMP_PERM 0x1023
16 #define ARCH_GET_XCOMP_GUEST_PERM 0x1024
[all …]
/openbmc/linux/drivers/clk/qcom/
H A Dgpucc-sc7180.c20 #define CX_GMU_CBCR_SLEEP_MASK 0xF
22 #define CX_GMU_CBCR_WAKE_MASK 0xF
33 { 249600000, 2000000000, 0 },
37 .offset = 0x100,
54 { P_BI_TCXO, 0 },
68 F(19200000, P_BI_TCXO, 1, 0, 0),
69 F(200000000, P_GPLL0_OUT_MAIN_DIV, 1.5, 0, 0),
74 .cmd_rcgr = 0x1120,
75 .mnd_width = 0,
89 .halt_reg = 0x107c,
[all …]
H A Dgpucc-sm8150.c30 { 249600000, 2000000000, 0 },
34 .l = 0x1a,
35 .alpha = 0xaaa,
36 .config_ctl_val = 0x20485699,
37 .config_ctl_hi_val = 0x00002267,
38 .config_ctl_hi1_val = 0x00000024,
39 .test_ctl_val = 0x00000000,
40 .test_ctl_hi_val = 0x00000000,
41 .test_ctl_hi1_val = 0x00000020,
42 .user_ctl_val = 0x00000000,
[all …]
H A Dgpucc-sm8250.c22 #define CX_GMU_CBCR_SLEEP_MASK 0xf
24 #define CX_GMU_CBCR_WAKE_MASK 0xf
36 { 249600000, 2000000000, 0 },
40 .l = 0x1a,
41 .alpha = 0xaaa,
42 .config_ctl_val = 0x20485699,
43 .config_ctl_hi_val = 0x00002261,
44 .config_ctl_hi1_val = 0x029a699c,
45 .user_ctl_val = 0x00000000,
46 .user_ctl_hi_val = 0x00000805,
[all …]
/openbmc/linux/include/linux/
H A Dkernelcapi.h19 #define CAPI_NOERROR 0x0000
21 #define CAPI_TOOMANYAPPLS 0x1001
22 #define CAPI_LOGBLKSIZETOSMALL 0x1002
23 #define CAPI_BUFFEXECEEDS64K 0x1003
24 #define CAPI_MSGBUFSIZETOOSMALL 0x1004
25 #define CAPI_ANZLOGCONNNOTSUPPORTED 0x1005
26 #define CAPI_REGRESERVED 0x1006
27 #define CAPI_REGBUSY 0x1007
28 #define CAPI_REGOSRESOURCEERR 0x1008
29 #define CAPI_REGNOTINSTALLED 0x1009
[all …]
/openbmc/linux/arch/xtensa/include/asm/
H A Dbootparam.h18 #define BP_VERSION 0x0001
20 #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/
21 #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */
22 #define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */
23 #define BP_TAG_SERIAL_BAUDRATE 0x1004 /* baud rate of current console. */
24 #define BP_TAG_SERIAL_PORT 0x1005 /* serial device of current console */
25 #define BP_TAG_FDT 0x1006 /* flat device tree addr */
27 #define BP_TAG_FIRST 0x7B0B /* first tag with a version number */
28 #define BP_TAG_LAST 0x7E0B /* last tag */
46 #define MEMORY_TYPE_CONVENTIONAL 0x1000
[all …]
/openbmc/qemu/hw/xtensa/
H A Dbootparam.h6 #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/
7 #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */
8 #define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */
9 #define BP_TAG_SERIAL_BAUDRATE 0x1004 /* baud rate of current console. */
10 #define BP_TAG_SERIAL_PORT 0x1005 /* serial device of current console */
11 #define BP_TAG_FDT 0x1006 /* flat device tree addr */
13 #define BP_TAG_FIRST 0x7B0B /* first tag with a version number */
14 #define BP_TAG_LAST 0x7E0B /* last tag */
27 #define MEMORY_TYPE_CONVENTIONAL 0x1000
28 #define MEMORY_TYPE_NONE 0x2000
/openbmc/qemu/linux-user/hppa/
H A Dsockbits.h4 #define TARGET_SOL_SOCKET 0xffff
6 #define TARGET_SO_DEBUG 0x0001
7 #define TARGET_SO_REUSEADDR 0x0004
8 #define TARGET_SO_KEEPALIVE 0x0008
9 #define TARGET_SO_DONTROUTE 0x0010
10 #define TARGET_SO_BROADCAST 0x0020
11 #define TARGET_SO_LINGER 0x0080
12 #define TARGET_SO_OOBINLINE 0x0100
13 #define TARGET_SO_REUSEPORT 0x0200
14 #define TARGET_SO_SNDBUF 0x1001
[all …]
/openbmc/u-boot/arch/xtensa/include/asm/
H A Dbootparam.h13 #define BP_VERSION 0x0001
15 #define BP_TAG_COMMAND_LINE 0x1001 /* command line (0-terminated string)*/
16 #define BP_TAG_INITRD 0x1002 /* ramdisk addr and size (bp_meminfo) */
17 #define BP_TAG_MEMORY 0x1003 /* memory addr and size (bp_meminfo) */
18 #define BP_TAG_SERIAL_BAUDRATE 0x1004 /* baud rate of current console */
19 #define BP_TAG_SERIAL_PORT 0x1005 /* serial device of current console */
20 #define BP_TAG_FDT 0x1006 /* flat device tree */
22 #define BP_TAG_FIRST 0x7B0B /* first tag with a version number */
23 #define BP_TAG_LAST 0x7E0B /* last tag */
32 unsigned long data[0]; /* data */
[all …]
/openbmc/linux/arch/m68k/include/asm/
H A Dmac_psc.h37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
[all …]
/openbmc/qemu/tests/qtest/
H A Dfuzz-sb16-test.c21 qtest_outw(s, 0x22c, 0x41); in test_fuzz_sb16_0x1c()
22 qtest_outb(s, 0x22c, 0x00); in test_fuzz_sb16_0x1c()
23 qtest_outw(s, 0x22c, 0x1004); in test_fuzz_sb16_0x1c()
24 qtest_outw(s, 0x22c, 0x001c); in test_fuzz_sb16_0x1c()
33 qtest_outw(s, 0x22c, 0xf141); in test_fuzz_sb16_0x91()
34 qtest_outb(s, 0x22c, 0x00); in test_fuzz_sb16_0x91()
35 qtest_outb(s, 0x22c, 0x24); in test_fuzz_sb16_0x91()
36 qtest_outb(s, 0x22c, 0x91); in test_fuzz_sb16_0x91()
42 * through command 0xd4
49 qtest_outb(s, 0x22c, 0x41); in test_fuzz_sb16_0xd4()
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/
H A Dlowlevel_init.S36 ldr r0, =0x102
41 MRC p15, 4, R0, c1, c0, 0
42 ldr r1, =0X1004 @Set cache enable bits for hypervisor mode
44 MCR p15, 4, R0, c1, c0, 0
47 .word 0x0
60 smc 0 @ SMC #0 to enter monitor mode
68 mov r6, #0xFF @ Indicate new Task call
69 mov r12, #0x00 @ Secure Service ID in R12
73 smc 0 @ SMC #0 to enter monitor mode
81 mov r12, #0xFE
[all …]
/openbmc/qemu/linux-user/x86_64/
H A Dtarget_syscall.h4 #define __USER_CS (0x33)
5 #define __USER_DS (0x2B)
45 #if 0 // Redefine this
99 #define TARGET_ARCH_SET_GS 0x1001
100 #define TARGET_ARCH_SET_FS 0x1002
101 #define TARGET_ARCH_GET_FS 0x1003
102 #define TARGET_ARCH_GET_GS 0x1004
/openbmc/linux/sound/soc/sof/amd/
H A Dacp-dsp-offset.h15 #define ACP_DMA_CNTL_0 0x00
16 #define ACP_DMA_DSCR_STRT_IDX_0 0x20
17 #define ACP_DMA_DSCR_CNT_0 0x40
18 #define ACP_DMA_PRIO_0 0x60
19 #define ACP_DMA_CUR_DSCR_0 0x80
20 #define ACP_DMA_ERR_STS_0 0xC0
21 #define ACP_DMA_DESC_BASE_ADDR 0xE0
22 #define ACP_DMA_DESC_MAX_NUM_DSCR 0xE4
23 #define ACP_DMA_CH_STS 0xE8
24 #define ACP_DMA_CH_GROUP 0xEC
[all …]
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Drenesas,cmt.yaml180 reg = <0xffca0000 0x1004>;
191 reg = <0xe6130000 0x1004>;
/openbmc/linux/sound/soc/tegra/
H A Dtegra186_asrc.h13 #define TEGRA186_ASRC_CFG 0x0
14 #define TEGRA186_ASRC_RATIO_INT_PART 0x4
15 #define TEGRA186_ASRC_RATIO_FRAC_PART 0x8
16 #define TEGRA186_ASRC_RATIO_LOCK_STATUS 0xc
17 #define TEGRA186_ASRC_MUTE_UNMUTE_DURATION 0x10
18 #define TEGRA186_ASRC_TX_THRESHOLD 0x14
19 #define TEGRA186_ASRC_RX_THRESHOLD 0x18
20 #define TEGRA186_ASRC_RATIO_COMP 0x1c
21 #define TEGRA186_ASRC_RX_STATUS 0x20
22 #define TEGRA186_ASRC_RX_CIF_CTRL 0x24
[all …]
/openbmc/linux/drivers/power/reset/
H A Daxxia-reset.c19 #define SC_CRIT_WRITE_KEY 0x1000
20 #define SC_LATCH_ON_RESET 0x1004
21 #define SC_RESET_CONTROL 0x1008
25 #define RSTCTL_RST_SYS (1<<0)
26 #define SC_EFUSE_INT_STATUS 0x180c
34 /* Access Key (0xab) */ in axxia_restart_handler()
35 regmap_write(syscon, SC_CRIT_WRITE_KEY, 0xab); in axxia_restart_handler()
36 /* Select internal boot from 0xffff0000 */ in axxia_restart_handler()
37 regmap_write(syscon, SC_LATCH_ON_RESET, 0x00000040); in axxia_restart_handler()
/openbmc/linux/include/linux/soc/samsung/
H A Dexynos-regs-pmu.h17 #define S5P_CENTRAL_SEQ_CONFIGURATION 0x0200
21 #define S5P_CENTRAL_SEQ_OPTION 0x0208
42 #define EXYNOS_SWRESET 0x0400
44 #define S5P_WAKEUP_STAT 0x0600
46 #define EXYNOS_EINT_WAKEUP_MASK_DISABLED 0xffffffff
47 #define EXYNOS_EINT_WAKEUP_MASK 0x0604
48 #define S5P_WAKEUP_MASK 0x0608
49 #define S5P_WAKEUP_MASK2 0x0614
52 #define EXYNOS4_MIPI_PHY_CONTROL(n) (0x0710 + (n) * 4)
54 #define EXYNOS4_PHY_ENABLE (1 << 0)
[all …]
/openbmc/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-is-command.h21 #define HIC_PREVIEW_STILL 0x0001
22 #define HIC_PREVIEW_VIDEO 0x0002
23 #define HIC_CAPTURE_STILL 0x0003
24 #define HIC_CAPTURE_VIDEO 0x0004
25 #define HIC_STREAM_ON 0x0005
26 #define HIC_STREAM_OFF 0x0006
27 #define HIC_SET_PARAMETER 0x0007
28 #define HIC_GET_PARAMETER 0x0008
29 #define HIC_SET_TUNE 0x0009
30 #define HIC_GET_STATUS 0x000b
[all …]

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