Home
last modified time | relevance | path

Searched +full:0 +full:x10002600 (Results 1 – 10 of 10) sorted by relevance

/openbmc/u-boot/arch/mips/dts/
H A Dbrcm,bcm6328.dtsi21 reg = <0x10000000 0x4>;
23 #size-cells = <0>;
26 cpu@0 {
29 reg = <0>;
49 #clock-cells = <0>;
55 #clock-cells = <0>;
62 reg = <0x10000004 0x4>;
75 reg = <0x10000010 0x4>;
81 reg = <0x10000068 0x4>;
87 offset = <0x0>;
[all …]
H A Dbrcm,bcm6362.dtsi22 reg = <0x10000000 0x4>;
24 #size-cells = <0>;
27 cpu@0 {
30 reg = <0>;
50 #clock-cells = <0>;
56 #clock-cells = <0>;
63 reg = <0x10000004 0x4>;
76 reg = <0x10000008 0x4>;
82 offset = <0x0>;
83 mask = <0x1>;
[all …]
H A Dbrcm,bcm63268.dtsi22 reg = <0x10000000 0x4>;
24 #size-cells = <0>;
27 cpu@0 {
30 reg = <0>;
50 #clock-cells = <0>;
56 #clock-cells = <0>;
63 reg = <0x10000004 0x4>;
69 reg = <0x100000ac 0x4>;
82 reg = <0x10000008 0x4>;
88 offset = <0x0>;
[all …]
/openbmc/linux/arch/mips/boot/dts/brcm/
H A Dbcm6362.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
H A Dbcm6328.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
41 #clock-cells = <0>;
55 #address-cells = <0>;
71 reg = <0x10000004 0x4>;
77 reg = <0x10000010 0x4>;
83 reg = <0x10000020 0x10>,
84 <0x10000030 0x10>;
[all …]
H A Dbcm63268.dtsi14 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
34 #clock-cells = <0>;
42 #clock-cells = <0>;
58 #address-cells = <0>;
74 reg = <0x10000004 0x4>;
80 reg = <0x10000008 0x4>;
85 offset = <0x0>;
86 mask = <0x1>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8186-pinctrl.yaml229 reg = <0x10005000 0x1000>,
230 <0x10002000 0x0200>,
231 <0x10002200 0x0200>,
232 <0x10002400 0x0200>,
233 <0x10002600 0x0200>,
234 <0x10002A00 0x0200>,
235 <0x10002c00 0x0200>,
236 <0x1000b000 0x1000>;
242 gpio-ranges = <&pio 0 0 185>;
244 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]
/openbmc/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt6765.c14 * iocfg[0]:0x10005000, iocfg[1]:0x10002C00, iocfg[2]:0x10002800,
15 * iocfg[3]:0x10002A00, iocfg[4]:0x10002000, iocfg[5]:0x10002200,
16 * iocfg[6]:0x10002500, iocfg[7]:0x10002600.
22 _x_bits, 32, 0)
29 PIN_FIELD(0, 202, 0x300, 0x10, 0, 4),
33 PIN_FIELD(0, 202, 0x0, 0x10, 0, 1),
37 PIN_FIELD(0, 202, 0x200, 0x10, 0, 1),
41 PIN_FIELD(0, 202, 0x100, 0x10, 0, 1),
45 PINS_FIELD_BASE(0, 3, 2, 0x00b0, 0x10, 4, 1),
46 PINS_FIELD_BASE(4, 7, 2, 0x00b0, 0x10, 5, 1),
[all …]
H A Dpinctrl-mt8186.c13 * iocfg[0]:0x10005000, iocfg[1]:0x10002000, iocfg[2]:0x10002200,
14 * iocfg[3]:0x10002400, iocfg[4]:0x10002600, iocfg[5]:0x10002800,
15 * iocfg[6]:0x10002C00.
20 PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, 32, 0)
26 PIN_FIELD(0, 184, 0x300, 0x10, 0, 4),
30 PIN_FIELD(0, 184, 0x0, 0x10, 0, 1),
34 PIN_FIELD(0, 184, 0x200, 0x10, 0, 1),
38 PIN_FIELD(0, 184, 0x100, 0x10, 0, 1),
42 PIN_FIELD_BASE(0, 0, 6, 0x0030, 0x10, 13, 1),
43 PIN_FIELD_BASE(1, 1, 6, 0x0030, 0x10, 14, 1),
[all …]