| /openbmc/u-boot/drivers/net/ |
| H A D | bcm-sf2-eth-gmac.h | 15 #define GMAC0_REG_BASE 0x18042000
17 #define GMAC0_INT_STATUS_ADDR (GMAC0_REG_BASE + 0x020)
18 #define GMAC0_INTR_RECV_LAZY_ADDR (GMAC0_REG_BASE + 0x100)
19 #define GMAC0_PHY_CTRL_ADDR (GMAC0_REG_BASE + 0x188)
22 #define GMAC_DMA_PTR_OFFSET 0x04
23 #define GMAC_DMA_ADDR_LOW_OFFSET 0x08
24 #define GMAC_DMA_ADDR_HIGH_OFFSET 0x0c
25 #define GMAC_DMA_STATUS0_OFFSET 0x10
26 #define GMAC_DMA_STATUS1_OFFSET 0x14
28 #define GMAC0_DMA_TX_CTRL_ADDR (GMAC0_REG_BASE + 0x200)
[all …]
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| /openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_dbu.h | 25 u32 res1[7];/* 0x0024 - 0x003C Reserved */
33 #define AT91_DBU_CID_ARCH_MASK 0x0ff00000
34 #define AT91_DBU_CID_ARCH_9xx 0x01900000
35 #define AT91_DBU_CID_ARCH_9XExx 0x02900000
|
| /openbmc/u-boot/board/samtec/vining_fpga/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
|
| /openbmc/u-boot/board/devboards/dbm-soc1/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
|
| /openbmc/u-boot/board/terasic/sockit/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
|
| /openbmc/u-boot/board/altera/cyclone5-socdk/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x08020000,
23 0x08000000,
24 0x00018020,
[all …]
|
| /openbmc/u-boot/board/terasic/de10-nano/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
|
| /openbmc/u-boot/board/terasic/de0-nano-soc/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00020080,
22 0x18060000,
23 0x08000000,
24 0x00018020,
[all …]
|
| /openbmc/u-boot/board/is1/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
|
| /openbmc/u-boot/board/ebv/socrates/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00004824,
22 0x01209000,
23 0x82400000,
24 0x00018004,
[all …]
|
| /openbmc/u-boot/board/sr1500/qts/ |
| H A D | iocsr_config.h | 15 0x00100000,
16 0x40000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x000E0180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
|
| /openbmc/u-boot/board/terasic/de1-soc/qts/ |
| H A D | iocsr_config.h | 15 0x00000000,
16 0x00000000,
17 0x0FF00000,
18 0xC0000000,
19 0x0000003F,
20 0x00008000,
21 0x00060180,
22 0x18060000,
23 0x18000000,
24 0x00018060,
[all …]
|
| /openbmc/linux/drivers/net/wireless/realtek/rtw89/ |
| H A D | rtw8852c_rfk_table.c | 8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
|
| H A D | rtw8852b_rfk_table.c | 8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
|
| H A D | rtw8852a_rfk_table.c | 8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
|
| /openbmc/qemu/hw/pci-host/ |
| H A D | astro.c | 94 case 0x0008: in elroy_chip_read_with_attrs()
95 val = 0x6000005; /* func_class */ in elroy_chip_read_with_attrs()
97 case 0x0058: in elroy_chip_read_with_attrs()
106 case 0x0080: in elroy_chip_read_with_attrs()
109 case 0x0108: in elroy_chip_read_with_attrs()
112 case 0x200 ... 0x250 - 1: /* LMMIO, GMMIO, WLMMIO, WGMMIO, ... */ in elroy_chip_read_with_attrs()
113 index = (addr - 0x200) / 8; in elroy_chip_read_with_attrs()
116 case 0x0680: in elroy_chip_read_with_attrs()
119 case 0x0688: in elroy_chip_read_with_attrs()
120 val = 0; /* ERROR_STATUS */ in elroy_chip_read_with_attrs()
[all …]
|
| /openbmc/linux/drivers/cpufreq/ |
| H A D | powernow-k8.h | 43 #define CPUID_XFAM 0x0ff00000 /* extended family */
44 #define CPUID_XFAM_K8 0
45 #define CPUID_XMOD 0x000f0000 /* extended model */
46 #define CPUID_XMOD_REV_MASK 0x000c0000
47 #define CPUID_XFAM_10H 0x00100000 /* family 0x10 */
48 #define CPUID_USE_XFAM_XMOD 0x00000f00
49 #define CPUID_GET_MAX_CAPABILITIES 0x80000000
50 #define CPUID_FREQ_VOLT_CAPABILITIES 0x80000007
54 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */
55 /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
[all …]
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| /openbmc/linux/include/uapi/linux/ |
| H A D | in6.h | 83 #define IPV6_FL_A_GET 0
92 #define IPV6_FL_S_NONE 0
107 #define IPV6_FLOWINFO_FLOWLABEL 0x000fffff
108 #define IPV6_FLOWINFO_PRIORITY 0x0ff00000
111 #define IPV6_PRIORITY_UNCHARACTERIZED 0x0000
112 #define IPV6_PRIORITY_FILLER 0x0100
113 #define IPV6_PRIORITY_UNATTENDED 0x0200
114 #define IPV6_PRIORITY_RESERVED1 0x0300
115 #define IPV6_PRIORITY_BULK 0x0400
116 #define IPV6_PRIORITY_RESERVED2 0x0500
[all …]
|
| H A D | atm.h | 43 #define ATM_NO_AAL 0 /* AAL not specified */
55 * SOL_SOCKET is 0xFFFF, so that's a bit of a problem
58 #define __SO_ENCODE(l,n,t) ((((l) & 0x1FF) << 22) | ((n) << 16) | \
60 #define __SO_LEVEL_MATCH(c,m) (((c) >> 22) == ((m) & 0x1FF))
61 #define __SO_NUMBER(c) (((c) >> 16) & 0x3f)
62 #define __SO_SIZE(c) ((c) & 0x3fff)
68 #define SO_SETCLP __SO_ENCODE(SOL_ATM,0,int)
94 #define ATM_HDR_GFC_MASK 0xf0000000
96 #define ATM_HDR_VPI_MASK 0x0ff00000
98 #define ATM_HDR_VCI_MASK 0x000ffff0
[all …]
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7d.dtsi | 17 cpu0: cpu@0 {
53 opp-supported-hw = <0xd>, <0x7>;
61 opp-supported-hw = <0xc>, <0x7>;
69 opp-supported-hw = <0x8>, <0x3>;
78 #phy-cells = <0>;
84 reg = <0x3007d000 0x1000>;
91 arm,primecell-periphid = <0xbb956>;
111 reg = <0x31001000 0x1000>,
112 <0x31002000 0x2000>,
113 <0x31004000 0x2000>,
[all …]
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| /openbmc/u-boot/include/ |
| H A D | elf.h | 35 #define EI_MAG0 0 /* file ID */
48 #define ELFMAG0 0x7f /* e_ident[EI_MAG0] */
56 #define ELFCLASSNONE 0 /* invalid */
62 #define ELFDATANONE 0 /* invalid */
68 #define ELFOSABI_NONE 0 /* No extension specified */
82 #define ELFABIVERSION 0
128 #define ET_NONE 0 /* No file type */
134 #define ET_LOOS 0xfe00 /* reserved range for operating */
135 #define ET_HIOS 0xfeff /* system specific e_type */
136 #define ET_LOPROC 0xff00 /* reserved range for processor */
[all …]
|
| /openbmc/linux/arch/arm/mach-versatile/ |
| H A D | integrator-hardware.h | 14 #define IO_BASE 0xF0000000 // VA of IO
15 #define IO_SIZE 0x0B000000 // How much?
19 #define IO_ADDRESS(x) (((x) & 0x000fffff) | (((x) >> 4) & 0x0ff00000) | IO_BASE)
25 #define INTEGRATOR_BOOT_ROM_LO 0x00000000
26 #define INTEGRATOR_BOOT_ROM_HI 0x20000000
40 #define INTEGRATOR_SSRAM_BASE 0x00000000
41 #define INTEGRATOR_SSRAM_ALIAS_BASE 0x10800000
44 #define INTEGRATOR_FLASH_BASE 0x24000000
47 #define INTEGRATOR_MBRD_SSRAM_BASE 0x28000000
53 #define INTEGRATOR_SDRAM_BASE 0x00040000
[all …]
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| /openbmc/linux/drivers/net/wireless/broadcom/b43legacy/ |
| H A D | xmit.h | 46 #define B43legacy_TX4_MAC_KEYIDX 0x0FF00000 /* Security key index */
48 #define B43legacy_TX4_MAC_KEYALG 0x00070000 /* Security key algorithm */
50 #define B43legacy_TX4_MAC_LIFETIME 0x00001000
51 #define B43legacy_TX4_MAC_FRAMEBURST 0x00000800
52 #define B43legacy_TX4_MAC_SENDCTS 0x00000400
53 #define B43legacy_TX4_MAC_AMPDU 0x00000300
55 #define B43legacy_TX4_MAC_CTSFALLBACKOFDM 0x00000200
56 #define B43legacy_TX4_MAC_FALLBACKOFDM 0x00000100
57 #define B43legacy_TX4_MAC_5GHZ 0x00000080
58 #define B43legacy_TX4_MAC_IGNPMQ 0x00000020
[all …]
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | da850-lcdk.dts | 25 /* 128 MB DDR2 SDRAM @ 0xc0000000 */
26 reg = <0xc0000000 0x08000000>;
36 reg = <0xc3000000 0x1000000>;
89 #size-cells = <0>;
93 #size-cells = <0>;
95 port@0 {
96 reg = <0>;
136 0x00 0x00101010 0x00f0f0f0
138 0x04 0x00000110 0x00000ff0
144 /* EMA_WAIT[0], EMA_OE, EMA_WE, EMA_CS[3] */
[all …]
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| /openbmc/linux/drivers/clk/ |
| H A D | clk-highbank.c | 14 #define HB_PLL_LOCK_500 0x20000000
15 #define HB_PLL_LOCK 0x10000000
17 #define HB_PLL_DIVF_MASK 0x0ff00000
19 #define HB_PLL_DIVQ_MASK 0x00070000
21 #define HB_PLL_DIVR_MASK 0x00001f00
23 #define HB_PLL_RANGE_MASK 0x00000070
24 #define HB_PLL_BYPASS 0x00000008
25 #define HB_PLL_RESET 0x00000004
26 #define HB_PLL_EXT_BYPASS 0x00000002
27 #define HB_PLL_EXT_ENA 0x00000001
[all …]
|