Searched +full:0 +full:x04180000 (Results 1 – 10 of 10) sorted by relevance
/openbmc/u-boot/board/freescale/ls1012afrdm/ |
H A D | ls1012afrdm.c | 29 val = 0; in get_board_version() 65 return 0; in checkboard() 79 return 0; in esdhc_status_fixup() 104 return 0; in dram_init() 113 0x04180000, /* mdctl */ in dram_init() 114 0x00030035, /* mdpdc */ in dram_init() 115 0x12554000, /* mdotc */ in dram_init() 116 0xbabf7954, /* mdcfg0 */ in dram_init() 117 0xdb328f64, /* mdcfg1 */ in dram_init() 118 0x01ff00db, /* mdcfg2 */ in dram_init() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | qcom,sc7180-mss-pil.yaml | 198 reg = <0x04080000 0x10000>, <0x04180000 0x48>; 201 iommus = <&apps_smmu 0x461 0x0>, <&apps_smmu 0x444 0x3>; 204 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 231 qcom,smem-states = <&modem_smp2p_out 0>; 238 qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; 239 qcom,spare-regs = <&tcsr_regs 0xb3e4>;
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H A D | qcom,sc7280-mss-pil.yaml | 216 reg = <0x04080000 0x10000>, <0x04180000 0x48>; 219 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>; 221 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; 224 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 248 qcom,smem-states = <&modem_smp2p_out 0>; 255 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>; 256 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>; 257 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
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H A D | qcom,msm8996-mss-pil.yaml | 348 reg = <0x04080000 0x408>, <0x04180000 0x48>; 352 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>, 382 qcom,halt-regs = <&tcsr_regs_1 0x3000 0x5000 0x4000>; 386 qcom,smem-states = <&modem_smp2p_out 0>;
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7180-idp.dts | 50 reg = <0x0 0x94600000 0x0 0x800000>; 56 reg = <0x0 0x80b00000 0x0 0x100000>; 61 reg = <0x0 0x86000000 0x0 0x8c00000>; 66 reg = <0x0 0x8ec00000 0x0 0x500000>; 71 reg = <0 0x8f600000 0 0x500000>; 76 reg = <0x0 0x94100000 0x0 0x200000>; 81 reg = <0x0 0x94400000 0x0 0x200000>; 86 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>; 87 size = <0x0 0x4000>; 94 regulators-0 { [all …]
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H A D | sc7180-trogdor.dtsi | 24 thermal-sensors = <&pm6150_adc_tm 0>; 53 reg = <0x0 0x94600000 0x0 0x800000>; 59 reg = <0x0 0x80b00000 0x0 0x100000>; 64 reg = <0x0 0x86000000 0x0 0x2000000>; 69 reg = <0 0x8f600000 0 0x500000>; 74 reg = <0x0 0x94100000 0x0 0x200000>; 79 reg = <0x0 0x94400000 0x0 0x200000>; 84 alloc-ranges = <0x0 0xa0000000 0x0 0x20000000>; 85 size = <0x0 0x4000>; 184 pinctrl-0 = <&uf_cam_en>; [all …]
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H A D | msm8998.dtsi | 15 qcom,msm-id = <292 0x0>; 25 reg = <0x0 0x80000000 0x0 0x0>; 34 reg = <0x0 0x85800000 0x0 0x600000>; 39 reg = <0x0 0x85e00000 0x0 0x100000>; 44 reg = <0x0 0x86000000 0x0 0x200000>; 49 reg = <0x0 0x86200000 0x0 0x2d00000>; 55 reg = <0x0 0x88f00000 0x0 0x200000>; 63 reg = <0x0 0x8ab00000 0x0 0x700000>; 68 reg = <0x0 0x8b200000 0x0 0x1a00000>; 73 reg = <0x0 0x8cc00000 0x0 0x7000000>; [all …]
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H A D | sdm845.dtsi | 77 #clock-cells = <0>; 84 #clock-cells = <0>; 91 #size-cells = <0>; 93 CPU0: cpu@0 { 96 reg = <0x0 0x0>; 97 clocks = <&cpufreq_hw 0>; 101 qcom,freq-domain = <&cpufreq_hw 0>; 125 reg = <0x0 0x100>; 126 clocks = <&cpufreq_hw 0>; 130 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sc7280.dtsi | 78 #clock-cells = <0>; 84 #clock-cells = <0>; 95 reg = <0x0 0x004cd000 0x0 0x1000>; 99 reg = <0x0 0x80000000 0x0 0x600000>; 104 reg = <0x0 0x80600000 0x0 0x200000>; 109 reg = <0x0 0x80800000 0x0 0x60000>; 114 reg = <0x0 0x80860000 0x0 0x20000>; 120 reg = <0x0 0x80884000 0x0 0x10000>; 125 reg = <0x0 0x808ff000 0x0 0x1000>; 130 reg = <0x0 0x80900000 0x0 0x200000>; [all …]
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/inc/ |
H A D | polaris10_pwrvirus.h | 27 #define mmCP_HYP_MEC1_UCODE_ADDR 0xf81a 28 #define mmCP_HYP_MEC1_UCODE_DATA 0xf81b 29 #define mmCP_HYP_MEC2_UCODE_ADDR 0xf81c 30 #define mmCP_HYP_MEC2_UCODE_DATA 0xf81d 49 { 0x00000000, mmRLC_CNTL }, 50 { 0x00000002, mmRLC_SRM_CNTL }, 51 { 0x15000000, mmCP_ME_CNTL }, 52 { 0x50000000, mmCP_MEC_CNTL }, 53 { 0x80000004, mmCP_DFY_CNTL }, 54 { 0x0840800a, mmCP_RB0_CNTL }, [all …]
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