Searched +full:0 +full:x01f03400 (Results 1 – 11 of 11) sorted by relevance
11 #define SUNXI_SRAM_A1_BASE 0x0000000014 #define SUNXI_SRAM_A2_BASE 0x00004000 /* 16 kiB */15 #define SUNXI_SRAM_A3_BASE 0x00008000 /* 13 kiB */16 #define SUNXI_SRAM_A4_BASE 0x0000b400 /* 3 kiB */17 #define SUNXI_SRAM_D_BASE 0x00010000 /* 4 kiB */18 #define SUNXI_SRAM_B_BASE 0x00020000 /* 64 kiB (secure) */20 #define SUNXI_DE2_BASE 0x0100000023 #define SUNXI_CPUCFG_BASE 0x0170000026 #define SUNXI_SRAMC_BASE 0x01c0000027 #define SUNXI_DRAMC_BASE 0x01c01000[all …]
49 reg = <0x01f03400 0x400>;50 interrupts = <0 39 4>;55 #size-cells = <0>;59 reg = <0x68>;
18 const: 046 "^.*@[0-9a-fA-F]+$":67 reg = <0x01f03400 0x400>;68 interrupts = <0 39 4>;73 #size-cells = <0>;76 reg = <0x3e3>;
60 simplefb_lcd: framebuffer@0 {84 #size-cells = <0>;86 cpu0: cpu@0 {89 reg = <0>;105 #clock-cells = <0>;113 #clock-cells = <0>;129 reg = <0x01c02000 0x1000>;138 reg = <0x01c0f000 0x1000>;152 #size-cells = <0>;157 reg = <0x01c10000 0x1000>;[all …]
84 #size-cells = <0>;86 cpu0: cpu@0 {89 reg = <0>;132 #clock-cells = <0>;139 #clock-cells = <0>;146 #clock-cells = <0>;172 #sound-dai-cells = <0>;196 reg = <0x1000000 0x400000>;200 ranges = <0 0x1000000 0x400000>;202 display_clocks: clock@0 {[all …]
61 #size-cells = <0>;63 cpu0: cpu@0 {71 reg = <0>;109 reg = <0x100>;118 reg = <0x101>;127 reg = <0x102>;136 reg = <0x103>;155 #clock-cells = <0>;168 #clock-cells = <0>;175 #clock-cells = <0>;[all …]
65 simplefb_hdmi: framebuffer@0 {100 #size-cells = <0>;102 cpu0: cpu@0 {105 reg = <0>;170 reg = <0x40000000 0x80000000>;187 #clock-cells = <0>;192 osc32k: clk@0 {193 #clock-cells = <0>;209 #clock-cells = <0>;216 #clock-cells = <0>;[all …]
91 #size-cells = <0>;93 cpu0: cpu@0 {96 reg = <0>;112 #clock-cells = <0>;120 #clock-cells = <0>;136 reg = <0x01c00000 0x30>;143 reg = <0x01d00000 0x80000>;146 ranges = <0 0x01d00000 0x80000>;148 ve_sram: sram-section@0 {151 reg = <0x000000 0x80000>;[all …]
62 #size-cells = <0>;64 cpu0: cpu@0 {71 reg = <0>;115 reg = <0x100>;126 reg = <0x101>;137 reg = <0x102>;148 reg = <0x103>;168 #clock-cells = <0>;181 #clock-cells = <0>;188 #clock-cells = <0>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;213 #clock-cells = <0>;221 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;252 #clock-cells = <0>;254 reg = <0x01c200d0 0x4>;274 reg = <0x01c02000 0x1000>;[all …]
47 #size-cells = <0>;49 cpu0: cpu@0 {52 reg = <0>;124 #clock-cells = <0>;131 #clock-cells = <0>;153 #size-cells = <0>;164 simple-audio-card,dai-link@0 {175 sound-dai = <&codec 0>;197 polling-delay-passive = <0>;198 polling-delay = <0>;[all …]