arm/dts/sun8i-a23-a33.dtsi

60 		simplefb_lcd: framebuffer@0 {
84 		#size-cells = <0>;
86 		cpu0: cpu@0 {
89 			reg = <0>;
105 			#clock-cells = <0>;
113 			#clock-cells = <0>;
129 			reg = <0x01c02000 0x1000>;
138 			reg = <0x01c0f000 0x1000>;
152 			#size-cells = <0>;
157 			reg = <0x01c10000 0x1000>;
171 			#size-cells = <0>;
176 			reg = <0x01c11000 0x1000>;
190 			#size-cells = <0>;
195 			reg = <0x01c03000 0x1000>;
202 			pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
205 			#size-cells = <0>;
210 			reg = <0x01c19000 0x0400>;
215 			phys = <&usbphy 0>;
217 			extcon = <&usbphy 0>;
240 			reg = <0x01c1a000 0x100>;
251 			reg = <0x01c1a400 0x100>;
261 			reg = <0x01c20000 0x400>;
262 			clocks = <&osc24M>, <&rtc 0>;
270 			reg = <0x01c20800 0x400>;
272 			clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
279 			uart0_pins_a: uart0@0 {
284 			uart1_pins_a: uart1@0 {
289 			uart1_pins_cts_rts_a: uart1-cts-rts@0 {
294 			mmc0_pins_a: mmc0@0 {
302 			mmc1_pins_a: mmc1@0 {
356 			i2c0_pins_a: i2c0@0 {
361 			i2c1_pins_a: i2c1@0 {
366 			i2c2_pins_a: i2c2@0 {
371 			lcd_rgb666_pins: lcd-rgb666@0 {
382 			reg = <0x01c20c00 0xa0>;
390 			reg = <0x01c20ca0 0x20>;
396 			reg = <0x01c21400 0xc>;
404 			reg = <0x01c22800 0x100>;
411 			reg = <0x01c28000 0x400>;
412 			interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
424 			reg = <0x01c28400 0x400>;
437 			reg = <0x01c28800 0x400>;
450 			reg = <0x01c28c00 0x400>;
463 			reg = <0x01c29000 0x400>;
476 			reg = <0x01c2ac00 0x400>;
482 			#size-cells = <0>;
487 			reg = <0x01c2b000 0x400>;
493 			#size-cells = <0>;
498 			reg = <0x01c2b400 0x400>;
504 			#size-cells = <0>;
510 			reg = <0x01c40000 0x10000>;
536 			reg = <0x01c81000 0x1000>,
537 			      <0x01c82000 0x2000>,
538 			      <0x01c84000 0x2000>,
539 			      <0x01c86000 0x2000>;
547 			reg = <0x01f00000 0x54>;
559 			reg = <0x01f00c00 0x400>;
565 			reg = <0x01f01400 0x200>;
569 				#clock-cells = <0>;
578 				#clock-cells = <0>;
587 				#clock-cells = <0>;
613 			reg = <0x01f01c00 0x300>;
618 			reg = <0x01f02800 0x400>;
629 			reg = <0x01f02c00 0x400>;
631 			clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
633 			resets = <&apb0_rst 0>;
638 			#size-cells = <0>;
648 			r_uart_pins_a: r_uart@0 {
656 			reg = <0x01f03400 0x400>;
662 			pinctrl-0 = <&r_rsb_pins>;
665 			#size-cells = <0>;