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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml88 const: 0
94 const: 0
211 reg = <0x01c18000 0x2000>;
230 #clock-cells = <0>;
233 #phy-cells = <0>;
238 reg = <0x01c24000 0x2000>, <0x01c26000 0x2000>;
257 qcom,4ln-config-sel = <&tcsr 0xa044 0>;
259 #clock-cells = <0>;
262 #phy-cells = <0>;
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc8280xp.dtsi32 #clock-cells = <0>;
37 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
50 clocks = <&cpufreq_hw 0>;
56 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x100>;
77 clocks = <&cpufreq_hw 0>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
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