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/openbmc/linux/drivers/media/platform/mediatek/mdp3/
H A Dmdp_reg_rsz.h10 #define PRZ_ENABLE 0x000
11 #define PRZ_CONTROL_1 0x004
12 #define PRZ_CONTROL_2 0x008
13 #define PRZ_INPUT_IMAGE 0x010
14 #define PRZ_OUTPUT_IMAGE 0x014
15 #define PRZ_HORIZONTAL_COEFF_STEP 0x018
16 #define PRZ_VERTICAL_COEFF_STEP 0x01c
17 #define PRZ_LUMA_HORIZONTAL_INTEGER_OFFSET 0x020
18 #define PRZ_LUMA_HORIZONTAL_SUBPIXEL_OFFSET 0x024
19 #define PRZ_LUMA_VERTICAL_INTEGER_OFFSET 0x028
[all …]
H A Dmtk-mdp3-comp.c68 0x0, BIT(0)); in init_rdma()
72 MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, BIT(0), BIT(0)); in init_rdma()
74 MM_REG_WRITE(cmd, subsys_id, base, MDP_RDMA_RESET, 0x0, BIT(0)); in init_rdma()
75 return 0; in init_rdma()
88 u32 reg = 0; in config_rdma_frame()
93 MDP_RDMA_RESV_DUMMY_0, 0x7, 0x7); in config_rdma_frame()
96 MDP_RDMA_RESV_DUMMY_0, 0x0, 0x7); in config_rdma_frame()
103 0x00030071); in config_rdma_frame()
109 0x03C8FE0F); in config_rdma_frame()
118 reg, 0xFFFFFFFF); in config_rdma_frame()
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dfpu.c21 #define FPSCR_RCHG 0x00000000
32 asm volatile("sts.l fpul, @-%0\n\t" in save_fpu()
33 "sts.l fpscr, @-%0\n\t" in save_fpu()
34 "fmov.s fr15, @-%0\n\t" in save_fpu()
35 "fmov.s fr14, @-%0\n\t" in save_fpu()
36 "fmov.s fr13, @-%0\n\t" in save_fpu()
37 "fmov.s fr12, @-%0\n\t" in save_fpu()
38 "fmov.s fr11, @-%0\n\t" in save_fpu()
39 "fmov.s fr10, @-%0\n\t" in save_fpu()
40 "fmov.s fr9, @-%0\n\t" in save_fpu()
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/openbmc/qemu/tests/tcg/loongarch64/
H A Dtest_fclass.c4 #define FLOAT_CLASS_SIGNALING_NAN 0x001
5 #define FLOAT_CLASS_QUIET_NAN 0x002
6 #define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
7 #define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
8 #define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
9 #define FLOAT_CLASS_NEGATIVE_ZERO 0x020
10 #define FLOAT_CLASS_POSITIVE_INFINITY 0x040
11 #define FLOAT_CLASS_POSITIVE_NORMAL 0x080
12 #define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
13 #define FLOAT_CLASS_POSITIVE_ZERO 0x200
[all …]
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Datmel,at91-pinctrl.txt37 0xffffffff 0xffc00c3b /* pioA */
38 0xffffffff 0x7fff3ccf /* pioB */
39 0xffffffff 0x007fffff /* pioC */
80 => 0xffc00c3b
85 The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
86 PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
89 PULL_UP (1 << 0): indicate this pin needs a pull up.
102 OUTPUT_VAL (1 << 8): output val (1 = high, 0 = low)
103 SLEWRATE (1 << 9): slew rate of the pin: 0 = disable, 1 = enable
105 DEBOUNCE_VAL (0x3fff << 17): debounce value.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml69 default: [0x0001000 0x0002000 0x0004000 0x0008000
70 0x0010000 0x0020000 0x0040000 0x0080000
71 0x0100000 0x0200000 0x0400000 0x0800000
72 0x1000000 0x2000000 0x4000000 0x8000000]
87 reg = <0xffd02000 0x1000>;
88 interrupts = <0 171 4>;
96 reg = <0xffd02000 0x1000>;
97 interrupts = <0 171 4>;
100 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
101 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/openbmc/linux/arch/mips/math-emu/
H A Dsp_sqrt.c34 /* sqrt(0) = 0 */ in ieee754sp_sqrt()
60 if (m == 0) { /* subnormal x */ in ieee754sp_sqrt()
61 for (i = 0; (ix & 0x00800000) == 0; i++) in ieee754sp_sqrt()
66 ix = (ix & 0x007fffff) | 0x00800000; in ieee754sp_sqrt()
73 s = 0; in ieee754sp_sqrt()
74 q = 0; /* q = sqrt(x) */ in ieee754sp_sqrt()
75 r = 0x01000000; /* r = moving bit from right to left */ in ieee754sp_sqrt()
77 while (r != 0) { in ieee754sp_sqrt()
88 if (ix != 0) { in ieee754sp_sqrt()
99 ix = (q >> 1) + 0x3f000000; in ieee754sp_sqrt()
/openbmc/qemu/target/alpha/
H A Dvax_helper.c36 sig = ((uint64_t)a.l & 0x80000000) << 32; in float32_to_f()
37 exp = (a.l >> 23) & 0xff; in float32_to_f()
38 mant = ((uint64_t)a.l & 0x007fffff) << 29; in float32_to_f()
43 } else if (exp == 0) { in float32_to_f()
44 if (mant == 0) { in float32_to_f()
46 r = 0; in float32_to_f()
68 exp = ((a >> 55) & 0x80) | ((a >> 52) & 0x7f); in f_to_float32()
69 mant_sig = ((a >> 32) & 0x80000000) | ((a >> 29) & 0x007fffff); in f_to_float32()
73 dynamic_excp(env, retaddr, EXCP_OPCDEC, 0); in f_to_float32()
78 r.l = 0; in f_to_float32()
[all …]
/openbmc/u-boot/include/configs/
H A DSBx81LIFKW.h18 #define CONFIG_SYS_SDRAM_BASE 0x00000000
52 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
59 #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */
60 #define CONFIG_ENV_SIZE 0x02000
61 #define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */
87 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
88 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
89 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
98 #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
99 #define CONFIG_PHY_BASE_ADR 0x01
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H A DSBx81LIFXCAT.h18 #define CONFIG_SYS_SDRAM_BASE 0x00000000
52 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
59 #define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */
60 #define CONFIG_ENV_SIZE 0x02000
61 #define CONFIG_ENV_OFFSET 0xc0000 /* env starts here - 768K */
87 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
88 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
89 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
98 #define CONFIG_MVGBE_PORTS {1, 0} /* enable a single port */
99 #define CONFIG_PHY_BASE_ADR 0x01
[all …]
H A Dedminiv2.h18 #define CONFIG_SPL_TEXT_BASE 0xffff0000
19 #define CONFIG_SPL_MAX_SIZE 0x0000fff0
20 #define CONFIG_SPL_STACK 0x00020000
21 #define CONFIG_SPL_BSS_START_ADDR 0x00020000
22 #define CONFIG_SPL_BSS_MAX_SIZE 0x0001ffff
23 #define CONFIG_SYS_SPL_MALLOC_START 0x00040000
24 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x0001ffff
25 #define CONFIG_SYS_UBOOT_BASE 0xfff90000
26 #define CONFIG_SYS_UBOOT_START 0x00800000
44 * MPP16 to MPP19, mode 0 for others
[all …]
/openbmc/linux/arch/powerpc/platforms/embedded6xx/
H A Dmpc10x.h24 * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff
25 * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff
26 * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000
29 * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff
30 * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff
31 * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000
40 #define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA)
41 #define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA)
42 #define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA)
49 #define MPC10X_MAPA_CNFG_ADDR 0x80000cf8
[all …]
/openbmc/u-boot/include/configs/km/
H A Dkm_arm.h42 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */
43 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */
44 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
47 #define CONFIG_KM_PNVRAM 0x80000
49 #define CONFIG_KM_PHRAM 0x17F000
51 #define CONFIG_KM_CRAMFS_ADDR 0x2400000
52 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */
53 #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */
58 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
61 "u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0" \
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/openbmc/linux/arch/powerpc/include/asm/
H A Dcode-patching.h17 * "b" == create_branch(addr, target, 0);
22 #define BRANCH_SET_LINK 0x1
23 #define BRANCH_ABSOLUTE 0x2
28 * 0 6 30 31
32 * Where AA = 0 and LK = 0
35 * by: imm32 = SignExtend(LI:'0b00', 32);
38 * (0x007fffff << 2) = 0x01fffffc = 0x1fffffc
40 * (0xff800000 << 2) = 0xfe000000 = -0x2000000
44 return (offset >= -0x2000000 && offset <= 0x1fffffc && !(offset & 0x3)); in is_offset_in_branch_range()
49 return offset >= -0x8000 && offset <= 0x7fff && !(offset & 0x3); in is_offset_in_cond_branch_range()
[all …]
/openbmc/linux/drivers/regulator/
H A Dqcom_rpm-regulator.c67 .mV = { 0, 0x00000FFF, 0 },
68 .ip = { 0, 0x00FFF000, 12 },
69 .fm = { 0, 0x03000000, 24 },
70 .pc = { 0, 0x3C000000, 26 },
71 .pf = { 0, 0xC0000000, 30 },
72 .pd = { 1, 0x00000001, 0 },
73 .ia = { 1, 0x00001FFE, 1 },
78 .mV = { 0, 0x00000FFF, 0 },
79 .ip = { 0, 0x00FFF000, 12 },
80 .fm = { 0, 0x03000000, 24 },
[all …]
/openbmc/qemu/hw/arm/
H A Dmps2.c130 memory_region_init_alias(mr, NULL, name, orig, 0, in make_ram_alias()
166 * 0x21000000 .. 0x21ffffff : PSRAM (16MB) in mps2_common_init()
168 * 0x00000000 .. 0x003fffff : ZBT SSRAM1 in mps2_common_init()
169 * 0x00400000 .. 0x007fffff : mirror of ZBT SSRAM1 in mps2_common_init()
170 * 0x20000000 .. 0x203fffff : ZBT SSRAM 2&3 in mps2_common_init()
171 * 0x20400000 .. 0x207fffff : mirror of ZBT SSRAM 2&3 in mps2_common_init()
173 * 0x01000000 .. 0x01003fff : block RAM (16K) in mps2_common_init()
174 * 0x01004000 .. 0x01007fff : mirror of above in mps2_common_init()
175 * 0x01008000 .. 0x0100bfff : mirror of above in mps2_common_init()
176 * 0x0100c000 .. 0x0100ffff : mirror of above in mps2_common_init()
[all …]
/openbmc/u-boot/doc/
H A DREADME.at9114 0x20000000 - 23FFFFFF SDRAM (64 MB)
15 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J13)
16 0xD0000000 - D07FFFFF Soldered Atmel Dataflash (AT45DB642)
22 - Dataflash on SPI chip select 0 (dataflash card)
36 0x20000000 - 23FFFFFF SDRAM (64 MB)
37 0xC0000000 - C07FFFFF Soldered Atmel Dataflash (AT45DB642)
38 0xD0000000 - Dxxxxxxx Atmel Dataflash card (J22)
43 - Dataflash on SPI chip select 0 (default)
58 0x20000000 - 23FFFFFF SDRAM (64 MB)
59 0xC0000000 - Cxxxxxxx Atmel Dataflash card (J9)
[all …]
/openbmc/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet.h31 #define XAE_OPTION_PROMISC (1 << 0)
74 #define XAXIDMA_TX_CR_OFFSET 0x00000000 /* Channel control */
75 #define XAXIDMA_TX_SR_OFFSET 0x00000004 /* Status */
76 #define XAXIDMA_TX_CDESC_OFFSET 0x00000008 /* Current descriptor pointer */
77 #define XAXIDMA_TX_TDESC_OFFSET 0x00000010 /* Tail descriptor pointer */
79 #define XAXIDMA_RX_CR_OFFSET 0x00000030 /* Channel control */
80 #define XAXIDMA_RX_SR_OFFSET 0x00000034 /* Status */
81 #define XAXIDMA_RX_CDESC_OFFSET 0x00000038 /* Current descriptor pointer */
82 #define XAXIDMA_RX_TDESC_OFFSET 0x00000040 /* Tail descriptor pointer */
84 #define XAXIDMA_CR_RUNSTOP_MASK 0x00000001 /* Start/stop DMA channel */
[all …]
/openbmc/linux/drivers/dio/
H A Ddio.c41 { .name = "DIO mem", .start = 0x00600000, .end = 0x007fffff },
43 { .name = "DIO-II mem", .start = 0x01000000, .end = 0x1fffffff }
98 for (i = 0; i < ARRAY_SIZE(names); i++) in dio_getname()
107 static char dio_no_name[] = { 0 };
126 for (scode = 0; scode < DIO_SCMAX; scode++) { in dio_find()
179 return 0; in dio_init()
194 for (i = 0; i < dio_bus.num_resources; i++) in dio_init()
198 for (scode = 0; scode < DIO_SCMAX; ++scode) { in dio_init()
199 u_char prid, secid = 0; /* primary, secondary ID bytes */ in dio_init()
269 return 0; in dio_init()
[all …]
/openbmc/linux/arch/arm/probes/kprobes/
H A Dopt-arm.c38 " sub sp, sp, #0xff\n"
42 " add r3, sp, #0xff\n"
51 * SP % 8 != 0 (SP % 4 == 0 should be ensured),
80 "1: .long 0\n"
83 "2: .long 0\n"
117 * kprobe in the address range. So always return 0.
121 return 0; in arch_check_optimized_kprobe()
124 /* Caller must ensure addr & 3 == 0 */
127 if (kp->ainsn.stack_space < 0) in can_optimize()
128 return 0; in can_optimize()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dlochnagar-hwmon.c51 LN2_CURR = 0,
72 u64 man = data & 0x007FFFFF; in float_to_long()
73 int exp = ((data & 0x7F800000) >> 23) - 127 - 23; in float_to_long()
74 bool negative = data & 0x80000000; in float_to_long()
81 else if (exp < 0) in float_to_long()
99 if (ret < 0) in do_measurement()
103 if (ret < 0) in do_measurement()
108 if (ret < 0) in do_measurement()
114 if (ret < 0) in do_measurement()
119 if (ret < 0) in do_measurement()
[all …]
/openbmc/linux/arch/mips/include/asm/mips-boards/
H A Dbonito64.h42 #define BONITO_BOOT_BASE 0x1fc00000
43 #define BONITO_BOOT_SIZE 0x00100000
45 #define BONITO_FLASH_BASE 0x1c000000
46 #define BONITO_FLASH_SIZE 0x03000000
48 #define BONITO_SOCKET_BASE 0x1f800000
49 #define BONITO_SOCKET_SIZE 0x00400000
51 #define BONITO_REG_BASE 0x1fe00000
52 #define BONITO_REG_SIZE 0x00040000
54 #define BONITO_DEV_BASE 0x1ff00000
55 #define BONITO_DEV_SIZE 0x00100000
[all …]
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dfpu.c22 #define FPSCR_RCHG 0x00000000
46 asm volatile ("sts.l fpul, @-%0\n\t" in save_fpu()
47 "sts.l fpscr, @-%0\n\t" in save_fpu()
50 "fmov.s fr15, @-%0\n\t" in save_fpu()
51 "fmov.s fr14, @-%0\n\t" in save_fpu()
52 "fmov.s fr13, @-%0\n\t" in save_fpu()
53 "fmov.s fr12, @-%0\n\t" in save_fpu()
54 "fmov.s fr11, @-%0\n\t" in save_fpu()
55 "fmov.s fr10, @-%0\n\t" in save_fpu()
56 "fmov.s fr9, @-%0\n\t" in save_fpu()
[all …]
/openbmc/linux/arch/m68k/68000/
H A Dhead.S24 #define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
51 .long 0
53 .long 0
55 .long 0
57 .long 0
69 .byte 0x4e, 0xfa, 0x00, 0x0a /* bra opcode (jmp 10 bytes) */
73 moveq #0, %d0
74 movew %d0, 0xfffff618 /* Watchdog off */
75 movel #0x00011f07, 0xfffff114 /* CS A1 Mask */
78 movew #0x2700, %sr /* disable all interrupts */
[all …]
/openbmc/linux/drivers/net/ethernet/ni/
H A Dnixge.c25 #define XAXIDMA_TX_CR_OFFSET 0x00 /* Channel control */
26 #define XAXIDMA_TX_SR_OFFSET 0x04 /* Status */
27 #define XAXIDMA_TX_CDESC_OFFSET 0x08 /* Current descriptor pointer */
28 #define XAXIDMA_TX_TDESC_OFFSET 0x10 /* Tail descriptor pointer */
30 #define XAXIDMA_RX_CR_OFFSET 0x30 /* Channel control */
31 #define XAXIDMA_RX_SR_OFFSET 0x34 /* Status */
32 #define XAXIDMA_RX_CDESC_OFFSET 0x38 /* Current descriptor pointer */
33 #define XAXIDMA_RX_TDESC_OFFSET 0x40 /* Tail descriptor pointer */
35 #define XAXIDMA_CR_RUNSTOP_MASK 0x1 /* Start/stop DMA channel */
36 #define XAXIDMA_CR_RESET_MASK 0x4 /* Reset DMA engine */
[all …]

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