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/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
/openbmc/u-boot/arch/m68k/include/asm/
H A Dimmap_520x.h12 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
13 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
14 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
15 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00030000)
16 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040000)
17 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
18 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
19 #define MMAP_INTCACK (CONFIG_SYS_MBAR + 0x00054000)
20 #define MMAP_I2C (CONFIG_SYS_MBAR + 0x00058000)
21 #define MMAP_QSPI (CONFIG_SYS_MBAR + 0x0005C000)
[all …]
H A Dimmap_5227x.h13 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
14 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
15 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
16 #define MMAP_CAN (CONFIG_SYS_MBAR + 0x00020000)
17 #define MMAP_RTC (CONFIG_SYS_MBAR + 0x0003C000)
18 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040010)
19 #define MMAP_SCM3 (CONFIG_SYS_MBAR + 0x00040070)
20 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
21 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
22 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x0004C000)
[all …]
H A Dimmap_5301x.h12 #define MMAP_SCM1 (CONFIG_SYS_MBAR + 0x00000000)
13 #define MMAP_XBS (CONFIG_SYS_MBAR + 0x00004000)
14 #define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00008000)
15 #define MMAP_MPU (CONFIG_SYS_MBAR + 0x00014000)
16 #define MMAP_FEC0 (CONFIG_SYS_MBAR + 0x00030000)
17 #define MMAP_FEC1 (CONFIG_SYS_MBAR + 0x00034000)
18 #define MMAP_SCM2 (CONFIG_SYS_MBAR + 0x00040000)
19 #define MMAP_EDMA (CONFIG_SYS_MBAR + 0x00044000)
20 #define MMAP_INTC0 (CONFIG_SYS_MBAR + 0x00048000)
21 #define MMAP_INTC1 (CONFIG_SYS_MBAR + 0x0004C000)
[all …]
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml41 '^opp-?[0-9]+$':
54 0: MSM8996, speedbin 0
61 0-3: unused
62 4: MSM8996SG, speedbin 0
66 enum: [0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7,
67 0x9, 0xd, 0xe, 0xf,
68 0x10, 0x20, 0x30, 0x70]
85 '^opp-?[0-9]+$':
101 #size-cells = <0>;
103 CPU0: cpu@0 {
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dimx-regs.h11 #define IRAM_BASE_ADDR 0x3E800000 /* internal ram */
12 #define IRAM_SIZE 0x00400000 /* 4MB */
14 #define AIPS0_BASE_ADDR (0x40000000UL)
15 #define AIPS1_BASE_ADDR (0x40080000UL)
17 /* AIPS 0 */
18 #define AXBS_BASE_ADDR (AIPS0_BASE_ADDR + 0x00000000)
19 #define CSE3_BASE_ADDR (AIPS0_BASE_ADDR + 0x00001000)
20 #define EDMA_BASE_ADDR (AIPS0_BASE_ADDR + 0x00002000)
21 #define XRDC_BASE_ADDR (AIPS0_BASE_ADDR + 0x00004000)
22 #define SWT0_BASE_ADDR (AIPS0_BASE_ADDR + 0x0000A000)
[all …]
/openbmc/linux/drivers/ata/
H A Dpata_macio.c45 ({ if (0) dev_printk(KERN_DEBUG, dev, format, ##arg); 0; })
75 #define IDE_TIMING_CONFIG 0x200
76 #define IDE_INTERRUPT 0x300
79 #define IDE_KAUAI_PIO_CONFIG 0x200
80 #define IDE_KAUAI_ULTRA_CONFIG 0x210
81 #define IDE_KAUAI_POLL_CONFIG 0x220
98 #define TR_133_PIOREG_PIO_MASK 0xff000fff
99 #define TR_133_PIOREG_MDMA_MASK 0x00fff800
100 #define TR_133_UDMAREG_UDMA_MASK 0x0003ffff
101 #define TR_133_UDMAREG_UDMA_EN 0x00000001
[all …]
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_hw_autogen.h9 #define QTX_COMM_DBELL(_DBQM) (0x002C0000 + ((_DBQM) * 4))
10 #define QTX_COMM_HEAD(_DBQM) (0x000E0000 + ((_DBQM) * 4))
11 #define QTX_COMM_HEAD_HEAD_S 0
12 #define QTX_COMM_HEAD_HEAD_M ICE_M(0x1FFF, 0)
13 #define PF_FW_ARQBAH 0x00080180
14 #define PF_FW_ARQBAL 0x00080080
15 #define PF_FW_ARQH 0x00080380
16 #define PF_FW_ARQH_ARQH_M ICE_M(0x3FF, 0)
[all...]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap5-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl OMAP5_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
13 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
14 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
15 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
16 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
H A Ddra7-l4.dtsi1 &l4_cfg { /* 0x4a000000 */
4 clocks = <&l4cfg_clkctrl DRA7_L4CFG_L4_CFG_CLKCTRL 0>;
6 reg = <0x4a000000 0x800>,
7 <0x4a000800 0x800>,
8 <0x4a001000 0x1000>;
12 ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */
13 <0x00100000 0x4a100000 0x100000>, /* segment 1 */
14 <0x00200000 0x4a200000 0x100000>; /* segment 2 */
17 segment@0 { /* 0x4a000000 */
21 ranges = <0x00000000 0x00000000 0x000800>, /* ap 0 */
[all …]
H A Domap4-l4.dtsi2 &l4_cfg { /* 0x4a000000 */
5 clocks = <&l4_cfg_clkctrl OMAP4_L4_CFG_CLKCTRL 0>;
7 reg = <0x4a000000 0x800>,
8 <0x4a000800 0x800>,
9 <0x4a001000 0x1000>;
13 ranges = <0x00000000 0x4a000000 0x080000>, /* segment 0 */
14 <0x00080000 0x4a080000 0x080000>, /* segment 1 */
15 <0x00100000 0x4a100000 0x080000>, /* segment 2 */
16 <0x00180000 0x4a180000 0x080000>, /* segment 3 */
17 <0x00200000 0x4a200000 0x080000>, /* segment 4 */
[all …]
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_register.h8 #define I40E_GL_ATQLEN_ATQCRIT_MASK I40E_MASK(0x1, I40E_GL_ATQLEN_ATQCRIT_SHIFT)
9 #define I40E_PF_ARQBAH 0x00080180 /* Reset: EMPR */
10 #define I40E_PF_ARQBAL 0x00080080 /* Reset: EMPR */
11 #define I40E_PF_ARQH 0x00080380 /* Reset: EMPR */
12 #define I40E_PF_ARQH_ARQH_SHIFT 0
13 #define I40E_PF_ARQH_ARQH_MASK I40E_MASK(0x3FF, I40E_PF_ARQH_ARQH_SHIFT)
14 #define I40E_PF_ARQLEN 0x00080280 /* Reset: EMPR */
16 #define I40E_PF_ARQLEN_ARQVFE_MASK I40E_MASK(0x1, I40E_PF_ARQLEN_ARQVFE_SHIFT)
18 #define I40E_PF_ARQLEN_ARQOVFL_MASK I40E_MASK(0x1, I40E_PF_ARQLEN_ARQOVFL_SHIFT)
20 #define I40E_PF_ARQLEN_ARQCRIT_MASK I40E_MASK(0x1, I40E_PF_ARQLEN_ARQCRIT_SHIFT)
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi28 #clock-cells = <0>;
35 #clock-cells = <0>;
43 #size-cells = <0>;
45 CPU0: cpu@0 {
48 reg = <0x0 0x0>;
52 clocks = <&kryocc 0>;
67 reg = <0x0 0x1>;
71 clocks = <&kryocc 0>;
81 reg = <0x0 0x100>;
100 reg = <0x0 0x101>;
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]