/openbmc/u-boot/board/is1/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
|
/openbmc/u-boot/board/sr1500/qts/ |
H A D | iocsr_config.h | 15 0x00100000, 16 0x40000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x000E0180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
|
/openbmc/u-boot/board/altera/arria5-socdk/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x00000000, 18 0x00000000, 19 0x00000000, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000060, 24 0x00018060, [all …]
|
/openbmc/u-boot/board/samtec/vining_fpga/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
|
/openbmc/u-boot/board/terasic/sockit/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
|
/openbmc/u-boot/board/altera/cyclone5-socdk/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x08020000, 23 0x08000000, 24 0x00018020, [all …]
|
/openbmc/u-boot/board/terasic/de10-nano/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x18060000, 23 0x08000000, 24 0x00018020, [all …]
|
/openbmc/u-boot/board/terasic/de0-nano-soc/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00020080, 22 0x18060000, 23 0x08000000, 24 0x00018020, [all …]
|
/openbmc/u-boot/board/terasic/de1-soc/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00060180, 22 0x18060000, 23 0x18000000, 24 0x00018060, [all …]
|
/openbmc/linux/arch/powerpc/platforms/embedded6xx/ |
H A D | mpc10x.h | 24 * Processor: 0x80000000 - 0x807fffff -> PCI I/O: 0x00000000 - 0x007fffff 25 * Processor: 0xc0000000 - 0xdfffffff -> PCI MEM: 0x00000000 - 0x1fffffff 26 * PCI MEM: 0x80000000 -> Processor System Memory: 0x00000000 29 * Processor: 0xfe000000 - 0xfebfffff -> PCI I/O: 0x00000000 - 0x00bfffff 30 * Processor: 0x80000000 - 0xbfffffff -> PCI MEM: 0x80000000 - 0xbfffffff 31 * PCI MEM: 0x00000000 -> Processor System Memory: 0x00000000 40 #define MPC10X_BRIDGE_8240 ((0x0003 << 16) | PCI_VENDOR_ID_MOTOROLA) 41 #define MPC10X_BRIDGE_107 ((0x0004 << 16) | PCI_VENDOR_ID_MOTOROLA) 42 #define MPC10X_BRIDGE_8245 ((0x0006 << 16) | PCI_VENDOR_ID_MOTOROLA) 49 #define MPC10X_MAPA_CNFG_ADDR 0x80000cf8 [all …]
|
/openbmc/u-boot/board/devboards/dbm-soc1/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00004824, 22 0x01209000, 23 0x82400000, 24 0x00018004, [all …]
|
/openbmc/u-boot/board/ebv/socrates/qts/ |
H A D | iocsr_config.h | 15 0x00000000, 16 0x00000000, 17 0x0FF00000, 18 0xC0000000, 19 0x0000003F, 20 0x00008000, 21 0x00004824, 22 0x01209000, 23 0x82400000, 24 0x00018004, [all …]
|
/openbmc/linux/drivers/gpu/drm/etnaviv/ |
H A D | common.xml.h | 7 http://0x04.net/cgit/index.cgi/rules-ng-ng 8 git clone git://0x04.net/rules-ng-ng 43 #define PIPE_ID_PIPE_3D 0x00000000 44 #define PIPE_ID_PIPE_2D 0x00000001 45 #define SYNC_RECIPIENT_FE 0x00000001 46 #define SYNC_RECIPIENT_RA 0x00000005 47 #define SYNC_RECIPIENT_PE 0x00000007 48 #define SYNC_RECIPIENT_DE 0x0000000b 49 #define SYNC_RECIPIENT_BLT 0x00000010 50 #define ENDIAN_MODE_NO_SWAP 0x00000000 [all …]
|
/openbmc/linux/arch/arm/mach-ep93xx/ |
H A D | ts72xx.h | 10 * febff000 22000000 4K model number register (bits 0-2) 19 #define TS72XX_MODEL_PHYS_BASE 0x22000000 20 #define TS72XX_MODEL_VIRT_BASE IOMEM(0xfebff000) 21 #define TS72XX_MODEL_SIZE 0x00001000 23 #define TS72XX_MODEL_TS7200 0x00 24 #define TS72XX_MODEL_TS7250 0x01 25 #define TS72XX_MODEL_TS7260 0x02 26 #define TS72XX_MODEL_TS7300 0x03 27 #define TS72XX_MODEL_TS7400 0x04 28 #define TS72XX_MODEL_MASK 0x07 [all …]
|
/openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | nvreg.h | 29 #define NV_PMC_OFFSET 0x00000000 30 #define NV_PMC_SIZE 0x00001000 32 #define NV_PBUS_OFFSET 0x00001000 33 #define NV_PBUS_SIZE 0x00001000 35 #define NV_PFIFO_OFFSET 0x00002000 36 #define NV_PFIFO_SIZE 0x00002000 38 #define NV_HDIAG_OFFSET 0x00005000 39 #define NV_HDIAG_SIZE 0x00001000 41 #define NV_PRAM_OFFSET 0x00006000 42 #define NV_PRAM_SIZE 0x00001000 [all …]
|
/openbmc/u-boot/arch/arm/include/asm/ |
H A D | fsl_secure_boot.h | 54 "setenv fdt_high 0xa0000000;" \ 55 "setenv initrd_high 0xcfffffff;" \ 59 "setenv fdt_high 0xffffffff;" \ 60 "setenv initrd_high 0xffffffff;" \ 75 #define CONFIG_BS_ADDR_DEVICE 0x20600000 76 #define CONFIG_BS_HDR_ADDR_DEVICE 0x20640000 78 #define CONFIG_BS_ADDR_DEVICE 0x580600000 79 #define CONFIG_BS_HDR_ADDR_DEVICE 0x580640000 81 #define CONFIG_BS_SIZE 0x00001000 82 #define CONFIG_BS_HDR_SIZE 0x00004000 [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | nvidia,tegra20-pcie.txt | 27 - cell 0 specifies the bus and device numbers of the root port: 30 - cell 1 denotes the upper 32 address bits and should be 0 45 - 0x81000000: I/O memory region 46 - 0x82000000: non-prefetchable memory region 47 - 0xc2000000: prefetchable memory region 73 - pinctrl-0: phandle for the default/active state of pin configurations. 104 - If lanes 0 to 3 are used: 150 - Root port 0 uses 4 lanes, root port 1 is unused. 158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes. 171 reg = <0x80003000 0x00000800 /* PADS registers */ [all …]
|
H A D | intel,keembay-pcie-ep.yaml | 57 reg = <0x37000000 0x00001000>, 58 <0x37100000 0x00001000>, 59 <0x37300000 0x00001000>, 60 <0x36000000 0x01000000>, 61 <0x37800000 0x00000200>;
|
/openbmc/u-boot/arch/arm/mach-at91/include/mach/ |
H A D | at91rm9200.h | 18 #define ATMEL_ID_USART0 6 /* USART 0 */ 26 #define ATMEL_ID_SSC0 14 /* Synch. Serial Controller 0 */ 29 #define ATMEL_ID_TC0 17 /* Timer Counter 0 */ 45 #define ATMEL_USB_HOST_BASE 0x00300000 47 #define ATMEL_BASE_TC 0xFFFA0000 48 #define ATMEL_BASE_UDP 0xFFFB0000 49 #define ATMEL_BASE_MCI 0xFFFB4000 50 #define ATMEL_BASE_TWI 0xFFFB8000 51 #define ATMEL_BASE_EMAC 0xFFFBC000 52 #define ATMEL_BASE_USART 0xFFFC0000 /* 4x 0x4000 Offset */ [all …]
|
/openbmc/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap4460.dtsi | 12 cpu0: cpu@0 { 32 reg = <0x4a002260 0x4 33 0x4a00232C 0x4 34 0x4a002378 0x18>; 36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */ 39 #thermal-sensor-cells = <0>; 45 reg = <0x4a307bd0 0x8>, <0x4a306014 0x4>, 46 <0x4A002268 0x4>; 52 1025000 0 0 0 0 0 53 1200000 0 0 0 0 0 [all …]
|
/openbmc/linux/drivers/net/usb/ |
H A D | lan78xx.h | 9 #define USB_VENDOR_REQUEST_WRITE_REGISTER 0xA0 10 #define USB_VENDOR_REQUEST_READ_REGISTER 0xA1 11 #define USB_VENDOR_REQUEST_GET_STATS 0xA2 32 #define TX_CMD_A_IGE_ (0x20000000) 33 #define TX_CMD_A_ICE_ (0x10000000) 34 #define TX_CMD_A_LSO_ (0x08000000) 35 #define TX_CMD_A_IPE_ (0x04000000) 36 #define TX_CMD_A_TPE_ (0x02000000) 37 #define TX_CMD_A_IVTG_ (0x01000000) 38 #define TX_CMD_A_RVTG_ (0x00800000) [all …]
|
/openbmc/u-boot/test/py/tests/ |
H A D | test_gpt.py | 78 u_boot_console.run_command('host bind 0 ' + state_disk_image.path) 79 output = u_boot_console.run_command('gpt read host 0') 84 output = u_boot_console.run_command('part list host 0') 85 assert '0x00000800 0x00000fff "part1"' in output 86 assert '0x00001000 0x00001bff "part2"' in output 94 u_boot_console.run_command('host bind 0 ' + state_disk_image.path) 95 output = u_boot_console.run_command('gpt verify host 0') 104 u_boot_console.run_command('host bind 0 ' + state_disk_image.path) 105 output = u_boot_console.run_command('gpt guid host 0') 116 u_boot_console.run_command('host bind 0 ' + state_disk_image.path) [all …]
|
/openbmc/linux/Documentation/devicetree/bindings/pmem/ |
H A D | pmem-region.txt | 48 * 0x5000 to 0x5fff that is backed by non-volatile memory. 52 reg = <0x00005000 0x00001000>; 61 reg = < 0x00006000 0x00001000 62 0x00008000 0x00001000 >;
|
/openbmc/linux/drivers/net/ethernet/smsc/ |
H A D | smsc911x.h | 12 #define LAN9115 0x01150000 13 #define LAN9116 0x01160000 14 #define LAN9117 0x01170000 15 #define LAN9118 0x01180000 16 #define LAN9215 0x115A0000 17 #define LAN9216 0x116A0000 18 #define LAN9217 0x117A0000 19 #define LAN9218 0x118A0000 20 #define LAN9210 0x92100000 21 #define LAN9211 0x92110000 [all …]
|
/openbmc/u-boot/drivers/mmc/ |
H A D | arm_pl180_mmci.h | 22 #define INIT_PWR 0xBF /* Power on, full power, not open drain */ 26 #define SDI_PWR_PWRCTRL_MASK 0x00000003 27 #define SDI_PWR_PWRCTRL_ON 0x00000003 28 #define SDI_PWR_PWRCTRL_OFF 0x00000000 29 #define SDI_PWR_DAT2DIREN 0x00000004 30 #define SDI_PWR_CMDDIREN 0x00000008 31 #define SDI_PWR_DAT0DIREN 0x00000010 32 #define SDI_PWR_DAT31DIREN 0x00000020 33 #define SDI_PWR_OPD 0x00000040 34 #define SDI_PWR_FBCLKEN 0x00000080 [all …]
|