Home
last modified time | relevance | path

Searched +full:0 +full:x00000 (Results 1 – 25 of 178) sorted by relevance

12345678

/openbmc/linux/arch/parisc/include/uapi/asm/
H A Dtermbits.h42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x4000
65 #define IUTF8 0x8000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
/openbmc/linux/include/uapi/asm-generic/
H A Dtermbits.h42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x2000
65 #define IUTF8 0x4000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
/openbmc/linux/arch/powerpc/include/uapi/asm/
H A Dtermbits.h48 #define VINTR 0
67 #define IXON 0x0200
68 #define IXOFF 0x0400
69 #define IUCLC 0x1000
70 #define IMAXBEL 0x2000
71 #define IUTF8 0x4000
74 #define ONLCR 0x00002
75 #define OLCUC 0x00004
76 #define NLDLY 0x00300
77 #define NL0 0x00000
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dmpic.h14 #define MPIC_GREG_BASE 0x01000
16 #define MPIC_GREG_FEATURE_0 0x00000
17 #define MPIC_GREG_FEATURE_LAST_SRC_MASK 0x07ff0000
19 #define MPIC_GREG_FEATURE_LAST_CPU_MASK 0x00001f00
21 #define MPIC_GREG_FEATURE_VERSION_MASK 0xff
22 #define MPIC_GREG_FEATURE_1 0x00010
23 #define MPIC_GREG_GLOBAL_CONF_0 0x00020
24 #define MPIC_GREG_GCONF_RESET 0x80000000
27 * 0b00 = pass through (interrupts routed to IRQ0)
28 * 0b01 = Mixed mode
[all …]
/openbmc/linux/arch/alpha/include/uapi/asm/
H A Dtermbits.h54 #define VEOF 0
73 #define IXON 0x0200
74 #define IXOFF 0x0400
75 #define IUCLC 0x1000
76 #define IMAXBEL 0x2000
77 #define IUTF8 0x4000
80 #define ONLCR 0x00002
81 #define OLCUC 0x00004
82 #define NLDLY 0x00300
83 #define NL0 0x00000
[all …]
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dtermbits.h51 #define VINTR 0
78 #define IUCLC 0x0200
79 #define IXON 0x0400
80 #define IXOFF 0x1000
81 #define IMAXBEL 0x2000
82 #define IUTF8 0x4000
85 #define OLCUC 0x00002
86 #define ONLCR 0x00004
87 #define NLDLY 0x00100
88 #define NL0 0x00000
[all …]
/openbmc/linux/arch/mips/include/uapi/asm/
H A Dtermbits.h55 #define VINTR 0 /* Interrupt character [ISIG] */
67 #if 0
81 #define IUCLC 0x0200 /* Map upper case to lower case on input */
82 #define IXON 0x0400 /* Enable start/stop output control */
83 #define IXOFF 0x1000 /* Enable start/stop input control */
84 #define IMAXBEL 0x2000 /* Ring bell when input queue is full */
85 #define IUTF8 0x4000 /* Input is UTF-8 */
88 #define OLCUC 0x00002 /* Map lower case to upper case on output */
89 #define ONLCR 0x00004 /* Map NL to CR-NL on output */
90 #define NLDLY 0x00100
[all …]
/openbmc/linux/drivers/soc/tegra/cbb/
H A Dtegra234-cbb.c8 * Error types supported by CBB2.0 are:
27 #define FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0 0x0
28 #define FABRIC_EN_CFG_STATUS_0_0 0x40
29 #define FABRIC_EN_CFG_ADDR_INDEX_0_0 0x60
30 #define FABRIC_EN_CFG_ADDR_LOW_0 0x80
31 #define FABRIC_EN_CFG_ADDR_HI_0 0x84
33 #define FABRIC_MN_MASTER_ERR_EN_0 0x200
34 #define FABRIC_MN_MASTER_ERR_FORCE_0 0x204
35 #define FABRIC_MN_MASTER_ERR_STATUS_0 0x208
36 #define FABRIC_MN_MASTER_ERR_OVERFLOW_STATUS_0 0x20c
[all …]
/openbmc/linux/drivers/media/common/b2c2/
H A Dflexcop-sram.c28 return 0; in flexcop_sram_init()
55 return 0; in flexcop_sram_set_dest()
75 #if 0
81 for (i = 0; i < len; i++) {
82 command = bank | addr | 0x04000000 | (*buf << 0x10);
86 while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
91 if (retries == 0)
94 write_reg_dw(adapter, 0x700, command);
106 for (i = 0; i < len; i++) {
107 command = bank | addr | 0x04008000;
[all …]
/openbmc/linux/tools/testing/selftests/kvm/include/x86_64/
H A Dapic.h15 #define APIC_DEFAULT_GPA 0xfee00000ULL
18 #define MSR_IA32_APICBASE 0x0000001b
22 #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
25 #define APIC_BASE_MSR 0x800
27 #define APIC_ID 0x20
28 #define APIC_LVR 0x30
29 #define GET_APIC_ID_FIELD(x) (((x) >> 24) & 0xFF)
30 #define APIC_TASKPRI 0x80
31 #define APIC_PROCPRI 0xA0
32 #define APIC_EOI 0xB0
[all …]
/openbmc/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
/openbmc/openbmc/meta-hpe/meta-gxp/recipes-bsp/u-boot/u-boot-fw-utils-gxp/
H A Dfw_env.config10 #/dev/mtd1 0x0000 0x20000 0x20000
11 #/dev/mtd2 0x0000 0x4000 0x4000
15 #/dev/mtd2 0x00000 0x20000
16 /dev/mtd/u-boot-env 0x00000 0x10000
17 /dev/mtd/u-boot-env 0x10000 0x10000
18 #/dev/mtd5 0x4200 0x4200
19 #/dev/mtd6 0x4200 0x4200
22 #/dev/mtd0 0x4000 0x4000 0x20000 2
25 #/dev/mmcblk0 0xc0000 0x20000
H A Dalt_fw_env.config10 #/dev/mtd1 0x0000 0x20000 0x20000
11 #/dev/mtd2 0x0000 0x4000 0x4000
15 #/dev/mtd2 0x00000 0x20000
16 /dev/mtd/alt-u-boot-env 0x00000 0x10000
17 /dev/mtd/alt-u-boot-env 0x10000 0x10000
18 #/dev/mtd5 0x4200 0x4200
19 #/dev/mtd6 0x4200 0x4200
22 #/dev/mtd0 0x4000 0x4000 0x20000 2
25 #/dev/mmcblk0 0xc0000 0x20000
/openbmc/openbmc/meta-aspeed/recipes-bsp/u-boot/files/
H A Dalt_fw_env.config10 #/dev/mtd1 0x0000 0x20000 0x20000
11 #/dev/mtd2 0x0000 0x4000 0x4000
15 #/dev/mtd2 0x00000 0x20000
16 /dev/mtd/alt-u-boot-env 0x00000 0x10000
17 /dev/mtd/alt-u-boot-env 0x10000 0x10000
18 #/dev/mtd5 0x4200 0x4200
19 #/dev/mtd6 0x4200 0x4200
22 #/dev/mtd0 0x4000 0x4000 0x20000 2
25 #/dev/mmcblk0 0xc0000 0x20000
H A Dfw_env.config10 #/dev/mtd1 0x0000 0x20000 0x20000
11 #/dev/mtd2 0x0000 0x4000 0x4000
15 #/dev/mtd2 0x00000 0x20000
16 /dev/mtd/u-boot-env 0x00000 0x10000
17 /dev/mtd/u-boot-env 0x10000 0x10000
18 #/dev/mtd5 0x4200 0x4200
19 #/dev/mtd6 0x4200 0x4200
22 #/dev/mtd0 0x4000 0x4000 0x20000 2
25 #/dev/mmcblk0 0xc0000 0x20000
H A Dfw_env_ast2600_mmc.config2 /dev/mmcblk0p1 0x00000 0x10000
3 /dev/mmcblk0p1 0x10000 0x10000
/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_8192f.c34 {0x420, 0x00}, {0x422, 0x78}, {0x428, 0x0a}, {0x429, 0x10},
35 {0x430, 0x00}, {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01},
36 {0x434, 0x04}, {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08},
37 {0x43c, 0x04}, {0x43d, 0x05}, {0x43e, 0x07}, {0x43f, 0x08},
38 {0x440, 0x5d}, {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10},
39 {0x445, 0xf0}, {0x446, 0x0e}, {0x447, 0x1f}, {0x448, 0x00},
40 {0x449, 0x00}, {0x44a, 0x00}, {0x44b, 0x00}, {0x44c, 0x10},
41 {0x44d, 0xf0}, {0x44e, 0x0e}, {0x44f, 0x00}, {0x450, 0x00},
42 {0x451, 0x00}, {0x452, 0x00}, {0x453, 0x00}, {0x480, 0x20},
43 {0x49c, 0x30}, {0x49d, 0xf0}, {0x49e, 0x03}, {0x49f, 0x3e},
[all …]
/openbmc/linux/drivers/gpu/drm/arm/
H A Dmalidp_regs.h20 #define MALIDP_DE_IRQ_UNDERRUN (1 << 0)
34 #define MALIDP500_SE_IRQ_CONF_MODE (1 << 0)
50 #define MALIDP550_SE_IRQ_EOW (1 << 0)
54 #define MALIDP550_DC_IRQ_CONF_VALID (1 << 0)
67 #define MALIDP_CFG_VALID (1 << 0)
68 #define MALIDP_DISP_FUNC_GAMMA (1 << 0)
75 #define MALIDP_REG_STATUS 0x00000
76 #define MALIDP_REG_SETIRQ 0x00004
77 #define MALIDP_REG_MASKIRQ 0x00008
78 #define MALIDP_REG_CLEARIRQ 0x0000c
[all …]
/openbmc/u-boot/arch/x86/include/asm/
H A Dlapic.h11 #define LAPIC_DEFAULT_BASE 0xfee00000
13 #define LAPIC_ID 0x020
14 #define LAPIC_LVR 0x030
16 #define LAPIC_TASKPRI 0x080
17 #define LAPIC_TPRI_MASK 0xff
19 #define LAPIC_RRR 0x0c0
21 #define LAPIC_SPIV 0x0f0
22 #define LAPIC_SPIV_ENABLE 0x100
24 #define LAPIC_ICR 0x300
25 #define LAPIC_DEST_SELF 0x40000
[all …]
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8qxp-lpcg.h11 #define LSIO_PWM_0_LPCG 0x00000
12 #define LSIO_PWM_1_LPCG 0x10000
13 #define LSIO_PWM_2_LPCG 0x20000
14 #define LSIO_PWM_3_LPCG 0x30000
15 #define LSIO_PWM_4_LPCG 0x40000
16 #define LSIO_PWM_5_LPCG 0x50000
17 #define LSIO_PWM_6_LPCG 0x60000
18 #define LSIO_PWM_7_LPCG 0x70000
19 #define LSIO_GPIO_0_LPCG 0x80000
20 #define LSIO_GPIO_1_LPCG 0x90000
[all …]
/openbmc/linux/sound/soc/fsl/
H A Dfsl_audmix.c38 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR0, 0, endis_sel),
41 SOC_ENUM_SINGLE_S(FSL_AUDMIX_ATCR1, 0, endis_sel),
53 { .tdms = 0, .clk = 0, .msg = "" },
59 { .tdms = 3, .clk = 0, .msg = "DIS->MIX: Please start both TDMs!\n" }
61 { .tdms = 1, .clk = 0, .msg = "TDM1->DIS: TDM1 not started!\n" },
63 { .tdms = 0, .clk = 0, .msg = "" },
67 { .tdms = 3, .clk = 0, .msg = "TDM1->MIX: Please start both TDMs!\n" }
69 { .tdms = 2, .clk = 0, .msg = "TDM2->DIS: TDM2 not started!\n" },
73 { .tdms = 0, .clk = 0, .msg = "" },
75 { .tdms = 3, .clk = 0, .msg = "TDM2->MIX: Please start both TDMs!\n" }
[all …]
/openbmc/linux/tools/perf/trace/beauty/tracepoints/
H A Dx86_msr.sh13 # Just the ones starting with 0x00000 so as to have a simple
17 …[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0x00000[[:xdigit:]]+)[[:s…
24 regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0xc00…
33 regex='^[[:space:]]*#[[:space:]]*define[[:space:]]+MSR_([[:alnum:]][[:alnum:]_]+)[[:space:]]+(0xc00…
/openbmc/u-boot/drivers/i2c/
H A Dmv_i2c.h12 #define I2C_COND_NORMAL 0
22 #define I2C_READ 0
27 #define I2C_ISR_INIT 0x7FF
30 #define ICR_START 0x1 /* start bit */
31 #define ICR_STOP 0x2 /* stop bit */
32 #define ICR_ACKNAK 0x4 /* send ACK(0) or NAK(1) */
33 #define ICR_TB 0x8 /* transfer byte bit */
34 #define ICR_MA 0x10 /* master abort */
35 #define ICR_SCLE 0x20 /* master clock enable, mona SCLEA */
36 #define ICR_IUE 0x40 /* unit enable */
[all …]
/openbmc/linux/arch/arm/mach-mv78xx0/
H A Dmv78xx0.h17 * f0800000 PCIe #0 I/O space
29 * fee00000 f0800000 64K PCIe #0 I/O space
39 #define MV78XX0_CORE0_REGS_PHYS_BASE 0xf1020000
40 #define MV78XX0_CORE1_REGS_PHYS_BASE 0xf1024000
41 #define MV78XX0_CORE_REGS_VIRT_BASE IOMEM(0xfe400000)
42 #define MV78XX0_CORE_REGS_PHYS_BASE 0xfe400000
45 #define MV78XX0_PCIE_IO_PHYS_BASE(i) (0xf0800000 + ((i) << 20))
48 #define MV78XX0_REGS_PHYS_BASE 0xf1000000
49 #define MV78XX0_REGS_VIRT_BASE IOMEM(0xfec00000)
52 #define MV78XX0_SRAM_PHYS_BASE (0xf2200000)
[all …]
/openbmc/linux/arch/arm/mach-dove/
H A Ddove.h14 * e0000000 @runtime 128M PCIe-0 Memory space
18 * f2000000 fee00000 1M PCIe-0 I/O space
22 #define DOVE_CESA_PHYS_BASE 0xc8000000
23 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
26 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
29 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
32 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
35 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
36 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
39 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]

12345678