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/openbmc/linux/fs/nls/
H A Dnls_ucs2_utils.c1 // SPDX-License-Identifier: GPL-2.0-or-later
25 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 000-00f */
26 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 010-01f */
27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 020-02f */
28 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 030-03f */
29 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 040-04f */
30 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 050-05f */
31 0, -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
32 -32, -32, -32, -32, -32, /* 060-06f */
33 -32, -32, -32, -32, -32, -32, -32, -32, -32, -32,
[all …]
/openbmc/linux/arch/sh/drivers/pci/
H A Dpcie-sh7786.h1 /* SPDX-License-Identifier: GPL-2.0
3 * SH7786 PCI-Express controller definitions.
11 /* PCIe bus-0(x4) on SH7786 */ // Rev1.171
12 #define SH4A_PCIE_SPW_BASE 0xFE000000 /* spw config address for controller 0 */
13 #define SH4A_PCIE_SPW_BASE1 0xFE200000 /* spw config address for controller 1 (Rev1.14)*/
14 #define SH4A_PCIE_SPW_BASE2 0xFCC00000 /* spw config address for controller 2 (Rev1.171)*/
15 #define SH4A_PCIE_SPW_BASE_LEN 0x00080000
17 #define SH4A_PCI_CNFG_BASE 0xFE040000 /* pci config address for controller 0 */
18 #define SH4A_PCI_CNFG_BASE1 0xFE240000 /* pci config address for controller 1 (Rev1.14)*/
19 #define SH4A_PCI_CNFG_BASE2 0xFCC40000 /* pci config address for controller 2 (Rev1.171)*/
[all …]
/openbmc/openbmc/poky/meta/lib/oe/
H A Delf.py4 # SPDX-License-Identifier: GPL-2.0-only
11 # TARGET_OS TARGET_ARCH MACHINE, OSABI, ABIVERSION, Little Endian, 32bit?
13 "arm" : (40, 0, 0, True, 32),
16 "arm" : (40, 0, 0, True, 32),
19 "aarch64" : (183, 0, 0, True, 64),
20 "aarch64_be" :(183, 0, 0, False, 64),
21 "i586" : (3, 0, 0, True, 32),
22 "i686" : (3, 0, 0, True, 32),
23 "x86_64": (62, 0, 0, True, 64),
24 "epiphany": (4643, 0, 0, True, 32),
[all …]
/openbmc/linux/tools/arch/x86/include/asm/
H A Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 21 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dcpufeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/required-features.h>
10 #include <asm/disabled-features.h>
16 #define NCAPINTS 22 /* N 32-bit words worth of info */
17 #define NBUGINTS 2 /* N 32-bit bug flags */
25 * please update the table in kernel/cpu/cpuid-deps.c as well.
28 /* Intel-defined CPU features, CPUID level 0x00000001 (EDX), word 0 */
29 #define X86_FEATURE_FPU ( 0*32+ 0) /* Onboard FPU */
30 #define X86_FEATURE_VME ( 0*32+ 1) /* Virtual Mode Extensions */
31 #define X86_FEATURE_DE ( 0*32+ 2) /* Debugging Extensions */
[all …]
H A Dvmxfeatures.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #define NVMXINTS 5 /* N 32-bit words worth of info */
16 /* Pin-Based VM-Execution Controls, EPT/VPID, APIC and VM-Functions, word 0 */
17 #define VMX_FEATURE_INTR_EXITING ( 0*32+ 0) /* "" VM-Exit on vectored interrupts */
18 #define VMX_FEATURE_NMI_EXITING ( 0*32+ 3) /* "" VM-Exit on NMIs */
19 #define VMX_FEATURE_VIRTUAL_NMIS ( 0*32+ 5) /* "vnmi" NMI virtualization */
20 #define VMX_FEATURE_PREEMPTION_TIMER ( 0*32+ 6) /* VMX Preemption Timer */
21 #define VMX_FEATURE_POSTED_INTR ( 0*32+ 7) /* Posted Interrupts */
23 /* EPT/VPID features, scattered to bits 16-23 */
24 #define VMX_FEATURE_INVVPID ( 0*32+ 16) /* INVVPID is supported */
[all …]
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2010 Tensilica Inc.
25 XTREG(0, 0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc, 0, 0, 0, 0, 0, 0)
26 XTREG(1, 4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0, 0, 0, 0, 0, 0, 0)
27 XTREG(2, 8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1, 0, 0, 0, 0, 0, 0)
28 XTREG(3, 12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2, 0, 0, 0, 0, 0, 0)
29 XTREG(4, 16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3, 0, 0, 0, 0, 0, 0)
30 XTREG(5, 20, 32, 4, 4, 0x0104, 0x0006, -2, 1, 0x0002, ar4, 0, 0, 0, 0, 0, 0)
31 XTREG(6, 24, 32, 4, 4, 0x0105, 0x0006, -2, 1, 0x0002, ar5, 0, 0, 0, 0, 0, 0)
32 XTREG(7, 28, 32, 4, 4, 0x0106, 0x0006, -2, 1, 0x0002, ar6, 0, 0, 0, 0, 0, 0)
33 XTREG(8, 32, 32, 4, 4, 0x0107, 0x0006, -2, 1, 0x0002, ar7, 0, 0, 0, 0, 0, 0)
[all …]
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dgdb-config.c.inc20 Boston, MA 02110-1301, USA. */
22 XTREG(0, 0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc,
23 0, 0, 0, 0, 0, 0)
24 XTREG(1, 4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0,
25 0, 0, 0, 0, 0, 0)
26 XTREG(2, 8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1,
27 0, 0, 0, 0, 0, 0)
28 XTREG(3, 12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2,
29 0, 0, 0, 0, 0, 0)
30 XTREG(4, 16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3,
[all …]
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A DHalHWImg8723B_RF.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
16 ((pDM_Odm->BoardType & BIT4) >> 4) << 0 | /* _GLNA */ in CheckPositive()
17 ((pDM_Odm->BoardType & BIT3) >> 3) << 1 | /* _GPA */ in CheckPositive()
18 ((pDM_Odm->BoardType & BIT7) >> 7) << 2 | /* _ALNA */ in CheckPositive()
19 ((pDM_Odm->BoardType & BIT6) >> 6) << 3 | /* _APA */ in CheckPositive()
20 ((pDM_Odm->BoardType & BIT2) >> 2) << 4; /* _BT */ in CheckPositive()
24 pDM_Odm->CutVersion << 24 | in CheckPositive()
25 pDM_Odm->SupportPlatform << 16 | in CheckPositive()
26 pDM_Odm->PackageType << 12 | in CheckPositive()
[all …]
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2016 Tensilica Inc.
24 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
25 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
26 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
27 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
28 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
29 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
30 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
31 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
32 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out3 --- Setting up images ---
7 --- Launching VM ---
11 --- Setting up Fleecing Graph ---
16 --- Setting up NBD Export ---
21 --- Sanity Check ---
23 read -P0x5d 0 64k
24 read -P0xd5 1M 64k
25 read -P0xdc 32M 64k
26 read -P0xcd 0x3ff0000 64k
27 read -P0 0x00f8000 32k
[all …]
/openbmc/linux/tools/testing/selftests/gpio/
H A Dgpio-mockup.sh1 #!/bin/bash -efu
2 # SPDX-License-Identifier: GPL-2.0
5 #0: success
7 #4: skip test - including run as non-root user
9 BASE=${0%/*}
13 module="gpio-mockup"
29 echo "$0 [-frv] [-t type]"
30 echo "-f: full test (minimal set run by default)"
31 echo "-r: test random lines as well as fence posts"
32 echo "-t: interface type:"
[all …]
/openbmc/openpower-vpd-parser/configuration/ibm/
H A Dbackup_restore_50003000.json3 "hardwarePath": "/sys/bus/i2c/drivers/at24/8-0050/eeprom"
15 "defaultValue": [32, 32],
24 "defaultValue": [32, 32, 32, 32, 32, 32, 32, 32],
33 "defaultValue": [32, 32, 32, 32, 32, 32, 32],
42 "defaultValue": [32, 32, 32, 32, 32, 32],
51 "defaultValue": [32, 32, 32, 32],
60 "defaultValue": [32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32],
69 "defaultValue": [32, 32, 32, 32],
80 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
81 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32
[all …]
H A Dbackup_restore_50001000.json3 "hardwarePath": "/sys/bus/i2c/drivers/at24/8-0050/eeprom"
15 "defaultValue": [32, 32],
24 "defaultValue": [32, 32, 32, 32, 32, 32, 32, 32],
33 "defaultValue": [32, 32, 32, 32, 32, 32, 32],
42 "defaultValue": [32, 32, 32, 32, 32, 32],
51 "defaultValue": [32, 32, 32, 32],
60 "defaultValue": [32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32],
69 "defaultValue": [32, 32, 32, 32],
80 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32,
81 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32, 32
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Dchacha-p10le-8x.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
43 #include <asm/asm-offsets.h>
44 #include <asm/asm-compat.h>
79 mflr 0
80 std 0, 16(1)
81 stdu 1,-752(1)
103 SAVE_VRS 20, 0, 9
105 SAVE_VRS 22, 32, 9
138 RESTORE_VRS 20, 0, 9
[all …]
/openbmc/linux/arch/sparc/crypto/
H A Ddes_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 .align 32
11 ld [%o0 + 0x00], %f0
12 ld [%o0 + 0x04], %f1
13 DES_KEXPAND(0, 0, 0)
14 DES_KEXPAND(0, 1, 2)
29 std %f0, [%o1 + 0x00]
30 std %f2, [%o1 + 0x08]
31 std %f4, [%o1 + 0x10]
32 std %f6, [%o1 + 0x18]
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
/openbmc/linux/arch/powerpc/kernel/
H A Dcpu_specs_book3s_32.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
12 .pvr_mask = 0xffff0000,
13 .pvr_value = 0x00030000,
17 .mmu_features = 0,
18 .icache_bsize = 32,
19 .dcache_bsize = 32,
25 .pvr_mask = 0xffff0000,
26 .pvr_value = 0x00060000,
30 .mmu_features = 0,
31 .icache_bsize = 32,
[all …]
H A Dcpu_specs_40x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
8 .pvr_mask = 0xffff0000,
9 .pvr_value = 0x41810000,
15 .icache_bsize = 32,
16 .dcache_bsize = 32,
21 .pvr_mask = 0xffff0000,
22 .pvr_value = 0x41610000,
28 .icache_bsize = 32,
29 .dcache_bsize = 32,
34 .pvr_mask = 0xffff0000,
[all …]
H A Dcpu_specs_44x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 .pvr_mask = 0xf0000fff,
12 .pvr_value = 0x40000850,
17 .icache_bsize = 32,
18 .dcache_bsize = 32,
22 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
23 .pvr_mask = 0xf0000fff,
24 .pvr_value = 0x40000858,
29 .icache_bsize = 32,
30 .dcache_bsize = 32,
[all …]
/openbmc/linux/arch/x86/crypto/
H A Dcamellia-aesni-avx2-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * x86_64/AVX2/AES-NI assembler implementation of Camellia
14 #define key_table 0
51 32-way camellia
56 * x0..x7: byte-sliced AB state
60 * x0..x7: new byte-sliced CD state
65 * S-function with AES subbytes \
147 vpbroadcastq key, t0; /* higher 64-bit duplicate ignored */ \
159 /* P-function */ \
193 vpxor 5 * 32(mem_cd), x1, x1; \
[all …]
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2010 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2015 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
/openbmc/qemu/target/xtensa/core-lx106/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2010 Tensilica Inc.
23 XTREG( 0, 0,32, 4, 4,0x0000,0x0006,-2, 8,0x0100,a0, 0,0,0,0,0,0)
24 XTREG( 1, 4,32, 4, 4,0x0001,0x0006,-2, 8,0x0100,a1, 0,0,0,0,0,0)
25 XTREG( 2, 8,32, 4, 4,0x0002,0x0006,-2, 8,0x0100,a2, 0,0,0,0,0,0)
26 XTREG( 3, 12,32, 4, 4,0x0003,0x0006,-2, 8,0x0100,a3, 0,0,0,0,0,0)
27 XTREG( 4, 16,32, 4, 4,0x0004,0x0006,-2, 8,0x0100,a4, 0,0,0,0,0,0)
28 XTREG( 5, 20,32, 4, 4,0x0005,0x0006,-2, 8,0x0100,a5, 0,0,0,0,0,0)
29 XTREG( 6, 24,32, 4, 4,0x0006,0x0006,-2, 8,0x0100,a6, 0,0,0,0,0,0)
30 XTREG( 7, 28,32, 4, 4,0x0007,0x0006,-2, 8,0x0100,a7, 0,0,0,0,0,0)
31 XTREG( 8, 32,32, 4, 4,0x0008,0x0006,-2, 8,0x0100,a8, 0,0,0,0,0,0)
[all …]
/openbmc/qemu/disas/
H A Dnanomips.c31 #include "disas/dis-asm.h"
62 return g_strdup_printf("0x%" PRIx64, a); in to_string()
68 return (data << (64 - (bit_size + bit_offset))) >> (64 - bit_size); in extract_bits()
74 uint64 shift = 63 - msb; in sign_extend()
86 info->fprintf_func(info->stream, "Invalid register mapping index %" PRIu64 in renumber_registers()
88 siglongjmp(info->buf, 1); in renumber_registers()
93 * decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
95 * Map a 4-bit code to the 5-bit register space according to this pattern:
97 * 1 0
98 * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
[all …]

12345678910>>...46