| /openbmc/linux/tools/memory-model/ |
| H A D | linux-kernel.def | 1 // SPDX-License-Identifier: GPL-2.0+
4 // "Frightening small children and disconcerting grown-ups: Concurrency
9 READ_ONCE(X) __load{once}(X)
10 WRITE_ONCE(X,V) { __store{once}(X,V); }
13 smp_store_release(X,V) { __store{release}(*X,V); }
14 smp_load_acquire(X) __load{acquire}(*X)
15 rcu_assign_pointer(X,V) { __store{release}(X,V); }
16 rcu_dereference(X) __load{once}(X)
17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; }
23 smp_mb__before_atomic() { __fence{before-atomic}; }
[all …]
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| /openbmc/u-boot/include/andestech/ |
| H A D | andes_pcu.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
24 unsigned int rev; /* 0x00 - PCU Revision */
25 unsigned int spinfo; /* 0x04 - Scratch Pad Info */
26 unsigned int rsvd1[2]; /* 0x08-0x0C: Reserved */
27 unsigned int soc_id; /* 0x10 - SoC ID */
28 unsigned int soc_ahb; /* 0x14 - SoC AHB configuration */
29 unsigned int soc_apb; /* 0x18 - SoC APB configuration */
31 unsigned int dcsrcr0; /* 0x20 - Driving Capability
33 unsigned int dcsrcr1; /* 0x24 - Driving Capability
35 unsigned int dcsrcr2; /* 0x28 - Driving Capability
[all …]
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| /openbmc/linux/lib/crypto/ |
| H A D | chacha.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
16 static void chacha_permute(u32 *x, int nrounds) in chacha_permute() argument
24 x[0] += x[4]; x[12] = rol32(x[12] ^ x[0], 16); in chacha_permute()
25 x[1] += x[5]; x[13] = rol32(x[13] ^ x[1], 16); in chacha_permute()
26 x[2] += x[6]; x[14] = rol32(x[14] ^ x[2], 16); in chacha_permute()
27 x[3] += x[7]; x[15] = rol32(x[15] ^ x[3], 16); in chacha_permute()
29 x[8] += x[12]; x[4] = rol32(x[4] ^ x[8], 12); in chacha_permute()
30 x[9] += x[13]; x[5] = rol32(x[5] ^ x[9], 12); in chacha_permute()
31 x[10] += x[14]; x[6] = rol32(x[6] ^ x[10], 12); in chacha_permute()
32 x[11] += x[15]; x[7] = rol32(x[7] ^ x[11], 12); in chacha_permute()
[all …]
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| /openbmc/linux/drivers/cpufreq/ |
| H A D | longhaul.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * VIA-specific information
59 -1, /* 0000 -> RESERVED */
60 30, /* 0001 -> 3.0x */
61 40, /* 0010 -> 4.0x */
62 -1, /* 0011 -> RESERVED */
63 -1, /* 0100 -> RESERVED */
64 35, /* 0101 -> 3.5x */
65 45, /* 0110 -> 4.5x */
66 55, /* 0111 -> 5.5x */
[all …]
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| /openbmc/linux/drivers/gpu/drm/nouveau/nvkm/nvfw/ |
| H A D | flcn.c | 29 nvkm_debug(subdev, "\tdmaIdx : %d\n", hdr->dma_idx); in loader_config_dump()
30 nvkm_debug(subdev, "\tcodeDmaBase : 0x%xx\n", hdr->code_dma_base); in loader_config_dump()
31 nvkm_debug(subdev, "\tcodeSizeTotal : 0x%x\n", hdr->code_size_total); in loader_config_dump()
32 nvkm_debug(subdev, "\tcodeSizeToLoad: 0x%x\n", hdr->code_size_to_load); in loader_config_dump()
33 nvkm_debug(subdev, "\tcodeEntryPoint: 0x%x\n", hdr->code_entry_point); in loader_config_dump()
34 nvkm_debug(subdev, "\tdataDmaBase : 0x%x\n", hdr->data_dma_base); in loader_config_dump()
35 nvkm_debug(subdev, "\tdataSize : 0x%x\n", hdr->data_size); in loader_config_dump()
36 nvkm_debug(subdev, "\toverlayDmaBase: 0x%x\n", hdr->overlay_dma_base); in loader_config_dump()
37 nvkm_debug(subdev, "\targc : 0x%08x\n", hdr->argc); in loader_config_dump()
38 nvkm_debug(subdev, "\targv : 0x%08x\n", hdr->argv); in loader_config_dump()
[all …]
|
| H A D | acr.c | 29 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_dump()
30 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_dump()
31 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_dump()
32 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_dump()
33 nvkm_debug(subdev, "\tstatus : %d\n", hdr->status); in wpr_header_dump()
40 nvkm_debug(subdev, "\tfalconID : %d\n", hdr->falcon_id); in wpr_header_v1_dump()
41 nvkm_debug(subdev, "\tlsbOffset : 0x%x\n", hdr->lsb_offset); in wpr_header_v1_dump()
42 nvkm_debug(subdev, "\tbootstrapOwner: %d\n", hdr->bootstrap_owner); in wpr_header_v1_dump()
43 nvkm_debug(subdev, "\tlazyBootstrap : %d\n", hdr->lazy_bootstrap); in wpr_header_v1_dump()
44 nvkm_debug(subdev, "\tbinVersion : %d\n", hdr->bin_version); in wpr_header_v1_dump()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | vega20_processpptables.c | 40 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
42 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
51 const void *table_address = hwmgr->soft_pp_table; in get_powerplay_table()
55 smu_atom_get_data_table(hwmgr->adev, index, in get_powerplay_table()
58 hwmgr->soft_pp_table = table_address; in get_powerplay_table()
59 hwmgr->soft_pp_table_size = size; in get_powerplay_table()
70 pr_info("Version = 0x%08x\n", pptable->Version);
72 pr_info("FeaturesToRun[0] = 0x%08x\n", pptable->FeaturesToRun[0]);
73 pr_info("FeaturesToRun[1] = 0x%08x\n", pptable->FeaturesToRun[1]);
75 pr_info("SocketPowerLimitAc0 = %d\n", pptable->SocketPowerLimitAc0);
[all …]
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| /openbmc/linux/drivers/scsi/qla4xxx/ |
| H A D | ql4_dbg.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2012 QLogic Corporation
19 printk("------------------------------------------------------------" in qla4xxx_dump_buffer()
20 "--\n"); in qla4xxx_dump_buffer()
22 printk("%02x", *c); in qla4xxx_dump_buffer()
38 printk(KERN_INFO "mailbox[%d] = 0x%08X\n", in qla4xxx_dump_registers()
39 i, readl(&ha->qla4_82xx_reg->mailbox_in[i])); in qla4xxx_dump_registers()
44 printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n", in qla4xxx_dump_registers()
46 readw(&ha->reg->mailbox[i])); in qla4xxx_dump_registers()
49 printk(KERN_INFO "0x%02X flash_address = 0x%08X\n", in qla4xxx_dump_registers()
[all …]
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| /openbmc/qemu/hw/usb/ |
| H A D | trace-events | 4 … int ep, void *p, const char *o, const char *n) "bus %d, port %s, ep %d, packet %p, state %s -> %s"
13 # hcd-ohci-pci.c
16 # hcd-ohci.c
17 usb_ohci_iso_td_read_failed(uint32_t addr) "ISO_TD read error at 0x%x"
18 …_TD ED head 0x%.8x tailp 0x%.8x, flags 0x%.8x bp 0x%.8x next 0x%.8x be 0x%.8x, frame_number 0x%.8x…
19 …2_t o4, uint32_t o5, uint32_t o6, uint32_t o7) "0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0x%.8x 0…
23 usb_ohci_iso_td_bad_bp_be(uint32_t bp, uint32_t be) "ISO_TD bp 0x%.8x be 0x%.8x"
24 …iso_td_bad_cc_not_accessed(uint32_t start, uint32_t next) "ISO_TD cc != not accessed 0x%.8x 0x%.8x"
25 …_td_bad_cc_overrun(uint32_t start, uint32_t next) "ISO_TD start_offset=0x%.8x > next_offset=0x%.8x"
26 …_t s, uint32_t e, const char *str, ssize_t len, int ret) "0x%.8x eo 0x%.8x sa 0x%.8x ea 0x%.8x dir…
[all …]
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| /openbmc/linux/Documentation/sound/cards/ |
| H A D | multisound.sh | 4 # -- Andrew Veliath <andrewtv@usa.net>
15 # -=-=- Getting Firmware -=-=-
26 # Currently, full-duplex digital audio (/dev/dsp only, /dev/audio is
37 # snd-msnd-lib - MultiSound base (requires snd)
39 # snd-msnd-classic - Base audio/mixer support for Classic, Monetery and
42 # snd-msnd-pinnacle - Base audio/mixer support for Pinnacle and Fiji cards
45 # Important Notes - Read Before Using
69 # These cards are configured through the driver snd-msnd-classic. You must
81 # can be used to configure the card in non-PnP mode, and in PnP mode
84 # pinnaclecfg is not required; you can use the snd-msnd-pinnacle module
[all …]
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| /openbmc/qemu/hw/misc/ |
| H A D | trace-events | 3 # allwinner-cpucfg.c
4 allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIx32
5 allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%…
6 allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x…
8 # allwinner-h3-dramc.c
10 allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64
11 …ead(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " …
12 …te(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " …
13 …ead(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " …
14 …te(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " …
[all …]
|
| /openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| H A D | sienna_cichlid_ppt.c | 77 if (smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 13))\
78 (*member) = (smu->smu_table.driver_pptable + offsetof(PPTable_beige_goby_t, field));\
80 (*member) = (smu->smu_table.driver_pptable + offsetof(PPTable_t, field));\
94 if (smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(11, 0, 13)) in get_table_size()
278 struct amdgpu_device *adev = smu->adev; in sienna_cichlid_get_allowed_feature_mask()
281 return -EINVAL; in sienna_cichlid_get_allowed_feature_mask()
306 if (adev->pm.pp_feature & PP_SCLK_DPM_MASK) { in sienna_cichlid_get_allowed_feature_mask()
311 if ((adev->pm.pp_feature & PP_GFX_DCS_MASK) && in sienna_cichlid_get_allowed_feature_mask()
312 (adev->ip_versions[MP1_HWIP][0] > IP_VERSION(11, 0, 7)) && in sienna_cichlid_get_allowed_feature_mask()
313 !(adev->flags & AMD_IS_APU)) in sienna_cichlid_get_allowed_feature_mask()
[all …]
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| /openbmc/linux/arch/powerpc/platforms/44x/ |
| H A D | fsp2.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * FSP-2 board specific routines
7 * Copyright 2002-2005 MontaVista Software Inc.
10 * Copyright (c) 2003-2005 Zultys Technologies
31 #define FSP2_BUS_ERR "ibm,bus-error-irq"
32 #define FSP2_CMU_ERR "ibm,cmu-error-irq"
33 #define FSP2_CONF_ERR "ibm,conf-error-irq"
34 #define FSP2_OPBD_ERR "ibm,opbd-error-irq"
35 #define FSP2_MCUE "ibm,mc-ue-irq"
36 #define FSP2_RST_WRN "ibm,reset-warning-irq"
[all …]
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| /openbmc/linux/net/xfrm/ |
| H A D | xfrm_state.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 * Split up af-specific functions
36 rcu_dereference_protected((table), lockdep_is_held(&(net)->xfrm.xfrm_state_lock))
54 static inline bool xfrm_state_hold_rcu(struct xfrm_state __rcu *x) in xfrm_state_hold_rcu() argument
56 return refcount_inc_not_zero(&x->refcnt); in xfrm_state_hold_rcu()
65 return __xfrm_dst_hash(daddr, saddr, reqid, family, net->xfrm.state_hmask); in xfrm_dst_hash()
73 return __xfrm_src_hash(daddr, saddr, family, net->xfrm.state_hmask); in xfrm_src_hash()
80 return __xfrm_spi_hash(daddr, spi, proto, family, net->xfrm.state_hmask); in xfrm_spi_hash()
85 return __xfrm_seq_hash(seq, net->xfrm.state_hmask); in xfrm_seq_hash()
94 if (_x->xso.type == XFRM_DEV_OFFLOAD_PACKET) \
[all …]
|
| /openbmc/qemu/hw/display/ |
| H A D | trace-events | 4 jazz_led_read(uint64_t addr, uint8_t val) "read addr=0x%"PRIx64": 0x%x"
5 jazz_led_write(uint64_t addr, uint8_t new) "write addr=0x%"PRIx64": 0x%x"
8 …nt dx, int dy, int dz, int button_state, int abs_pointer_wanted) "%p x %d y %d z %d bs 0x%x abs %d"
9 xenfb_key_event(void *opaque, int scancode, int button_state) "%p scancode %d bs 0x%x"
13 g364fb_read(uint64_t addr, uint32_t val) "read addr=0x%"PRIx64": 0x%x"
14 g364fb_write(uint64_t addr, uint32_t new) "write addr=0x%"PRIx64": 0x%x"
17 vmware_value_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
18 vmware_value_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
19 vmware_palette_read(uint32_t index, uint32_t value) "index %d, value 0x%x"
20 vmware_palette_write(uint32_t index, uint32_t value) "index %d, value 0x%x"
[all …]
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| /openbmc/qemu/hw/i386/ |
| H A D | trace-events | 3 # x86-iommu.c
7 …onst char *type, uint64_t hi, uint64_t lo) "invalidate desc type %s high 0x%"PRIx64" low 0x%"PRIx64
8 vtd_inv_desc_cc_domain(uint16_t domain) "context invalidate domain 0x%"PRIx16
11 …_devices(uint16_t sid, uint16_t fmask) "context invalidate devices sid 0x%"PRIx16" fmask 0x%"PRIx16
13 vtd_inv_desc_iotlb_domain(uint16_t domain) "iotlb invalidate whole domain 0x%"PRIx16
14 …in, uint64_t addr, uint8_t mask) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRIx64" mask 0x%"PR…
15 …t mask, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" addr 0x%"PRIx64" mask 0x%"PRIx8" pasi…
16 …_iotlb_pasid(uint16_t domain, uint32_t pasid) "iotlb invalidate domain 0x%"PRIx16" pasid 0x%"PRIx32
17 …ait_sw(uint64_t addr, uint32_t data) "wait invalidate status write addr 0x%"PRIx64" data 0x%"PRIx32
19 …sc_wait_write_fail(uint64_t hi, uint64_t lo) "write fail for wait desc hi 0x%"PRIx64" lo 0x%"PRIx64
[all …]
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 125.out | 2 --- cluster_size=512 growth_size=16 create_mode=off growth_mode=off ---
6 1.953 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
8 16 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
10 --- cluster_size=512 growth_size=16 create_mode=off growth_mode=metadata ---
14 1.953 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
16 16 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
18 --- cluster_size=512 growth_size=16 create_mode=off growth_mode=falloc ---
22 1.953 MiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
24 16 KiB, X ops; XX:XX:XX.X (XXX YYY/sec and XXX ops/sec)
26 --- cluster_size=512 growth_size=16 create_mode=off growth_mode=full ---
[all …]
|
| /openbmc/qemu/hw/net/ |
| H A D | trace-events | 3 # allwinner-sun8i-emac.c
4 …8i_emac_mii_write_reg(uint32_t reg, uint32_t value) "MII write: reg=0x%" PRIx32 " value=0x%" PRIx32
5 …un8i_emac_mii_read_reg(uint32_t reg, uint32_t value) "MII read: reg=0x%" PRIx32 " value=0x%" PRIx32
6 …(uint32_t desc, uint32_t paddr, uint32_t bytes) "RX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 "…
7 …(uint32_t desc, uint32_t paddr, uint32_t bytes) "TX packet: desc=0x%" PRIx32 " paddr=0x%" PRIx32 "…
10 allwinner_sun8i_emac_read(uint64_t offset, uint64_t val) "MMIO read: offset=0x%" PRIx64 " value=0x%…
11 …sun8i_emac_write(uint64_t offset, uint64_t val) "MMIO write: offset=0x%" PRIx64 " value=0x%" PRIx64
14 lance_mem_readw(uint64_t addr, uint32_t ret) "addr=0x%"PRIx64"val=0x%04x"
15 lance_mem_writew(uint64_t addr, uint32_t val) "addr=0x%"PRIx64"val=0x%04x"
20 mipsnet_read(uint64_t addr, uint32_t val) "read addr=0x%" PRIx64 " val=0x%x"
[all …]
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| /openbmc/qemu/hw/intc/ |
| H A D | trace-events | 7 pic_ioport_write(bool master, uint64_t addr, uint64_t val) "master %d addr 0x%"PRIx64" val 0x%"PRIx…
8 pic_ioport_read(bool master, uint64_t addr, int val) "master %d addr 0x%"PRIx64" val 0x%x"
11 cpu_set_apic_base(uint64_t val) "0x%016"PRIx64
12 cpu_get_apic_base(uint64_t val) "0x%016"PRIx64
17 apic_register_read(uint8_t reg, uint64_t val) "register 0x%02x = 0x%"PRIx64
18 apic_register_write(uint8_t reg, uint64_t val) "register 0x%02x = 0x%"PRIx64
25 …nt8_t size, uint32_t val) "ioapic mem read addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" retv…
26 …int8_t size, uint32_t val) "ioapic mem write addr 0x%"PRIx8" regsel: 0x%"PRIx8" size 0x%"PRIx8" va…
35 …io_intctl_mem_readl(uint32_t cpu, uint64_t addr, uint32_t ret) "read cpu %d reg 0x%"PRIx64" = 0x%x"
36 …_intctl_mem_writel(uint32_t cpu, uint64_t addr, uint32_t val) "write cpu %d reg 0x%"PRIx64" = 0x%x"
[all …]
|
| /openbmc/u-boot/include/ |
| H A D | imx_lpi2c.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
82 /* ----------------------------------------------------------------------------
83 -- LPI2C Register Masks
84 ---------------------------------------------------------------------------- */
91 /*! @name VERID - Version ID Register */
94 #define LPI2C_VERID_FEATURE(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_FEATUR… argument
97 #define LPI2C_VERID_MINOR(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MINOR_… argument
100 #define LPI2C_VERID_MAJOR(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_VERID_MAJOR_… argument
102 /*! @name PARAM - Parameter Register */
105 #define LPI2C_PARAM_MTXFIFO(x) (((uint32_t)(((uint32_t)(x)) << LPI2C_PARAM_MTXFIF… argument
[all …]
|
| /openbmc/qemu/hw/s390x/ |
| H A D | trace-events | 5 …t8_t erc, uint16_t rsid, const char *chained) "CSS: queueing crw: rsc=0x%x, erc=0x%x, rsid=0x%x %s"
6 css_chpid_add(uint8_t cssid, uint8_t chpid, uint8_t type) "CSS: add chpid %x.%02x (type 0x%02x)"
7 css_new_image(uint8_t cssid, const char *default_cssid) "CSS: add css image 0x%02x %s"
8 …n, uint8_t cssid, uint8_t ssid, uint16_t schid, uint16_t devno) "CSS: %s %x.%x.%04x (devno 0x%04x)"
9 … isc, const char *conditional) "CSS: I/O interrupt on sch %x.%x.%04x (intparm 0x%08x, isc 0x%x) %s"
10 css_adapter_interrupt(uint8_t isc) "CSS: adapter I/O interrupt (isc 0x%x)"
11 css_do_sic(uint16_t mode, uint8_t isc) "CSS: set interruption mode 0x%x on isc 0x%x"
13 # virtio-ccw.c
14 …_ccw(int cssid, int ssid, int schid, int cmd_code) "VIRTIO-CCW: %x.%x.%04x: interpret command 0x%x"
15 … int schid, int devno, const char *devno_mode) "VIRTIO-CCW: add subchannel %x.%x.%04x, devno 0x%04…
[all …]
|
| /openbmc/linux/arch/hexagon/kernel/ |
| H A D | vm_init_segtable.S | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
9 * These tables are pre-computed and linked into kernel.
17 * No user mode access, RWX, write-back cache. The entry needs
40 #define X __HVM_PDE_S_INVALID macro
47 .word X,X,X,X
48 .word X,X,X,X
49 .word X,X,X,X
50 .word X,X,X,X
51 .word X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X
[all …]
|
| /openbmc/linux/arch/mips/include/asm/sibyte/ |
| H A D | sb1250_genbus.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
27 * Generic Bus Region Configuration Registers (Table 11-4)
40 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
43 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
45 #define V_IO_WIDTH_SEL(x) _SB_MAKEVALUE(x, S_IO_WIDTH_SEL) argument
46 #define G_IO_WIDTH_SEL(x) _SB_GETVALUE(x, S_IO_WIDTH_SEL, M_IO_WIDTH_SEL) argument
50 #if SIBYTE_HDR_FEATURE(1250, PASS2) || SIBYTE_HDR_FEATURE(112x, PASS1) \
54 #endif /* 1250 PASS2 || 112x PASS1 || 1480 */
62 #define V_IO_TIMEOUT(x) _SB_MAKEVALUE(x, S_IO_TIMEOUT) argument
63 #define G_IO_TIMEOUT(x) _SB_GETVALUE(x, S_IO_TIMEOUT, M_IO_TIMEOUT) argument
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | soc15d.h | 80 #define CP_PACKETJ_GET_REG(x) ((x) & 0x3FFFF) argument
81 #define CP_PACKETJ_GET_RES(x) (((x) >> 18) & 0x3F) argument
82 #define CP_PACKETJ_GET_COND(x) (((x) >> 24) & 0xF) argument
83 #define CP_PACKETJ_GET_TYPE(x) (((x) >> 28) & 0xF) argument
88 #define PACKET3_BASE_INDEX(x) ((x) << 0) argument
116 #define WRITE_DATA_DST_SEL(x) ((x) << 8) argument
117 /* 0 - register
118 * 1 - memory (sync - via GRBM)
119 * 2 - gl2
120 * 3 - gds
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| /openbmc/linux/tools/lib/bpf/ |
| H A D | bpf_endian.h | 1 /* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */
13 #define ___bpf_mvb(x, b, n, m) ((__u##b)(x) << (b-(n+1)*8) >> (b-8) << (m*8)) argument
15 #define ___bpf_swab16(x) ((__u16)( \ argument
16 ___bpf_mvb(x, 16, 0, 1) | \
17 ___bpf_mvb(x, 16, 1, 0)))
19 #define ___bpf_swab32(x) ((__u32)( \ argument
20 ___bpf_mvb(x, 32, 0, 3) | \
21 ___bpf_mvb(x, 32, 1, 2) | \
22 ___bpf_mvb(x, 32, 2, 1) | \
23 ___bpf_mvb(x, 32, 3, 0)))
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