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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
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H A Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
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H A Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
17 :widths: 1 1 2
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
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H A Dpixfmt-srggb14p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14P:
4 .. _v4l2-pix-fmt-sbggr14p:
5 .. _v4l2-pix-fmt-sgbrg14p:
6 .. _v4l2-pix-fmt-sgrbg14p:
12 *man V4L2_PIX_FMT_SRGGB14P(2)*
17 14-bit packed Bayer formats
29 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
30 with alternating green-red and green-blue rows. They are conventionally
41 \setlength{\tabcolsep}{2pt}
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H A Dsubdev-image-processing-full.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-186 71 1174.5119 332.1463"
17 sodipodi:docname="subdev-image-processing-full.svg">
40 inkscape:pageshadow="2"
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
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H A Dpixfmt-srggb10p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
25 of the pixels, and the 5th byte contains the 2 least significants
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
38 .. flat-table::
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H A Dsubdev-image-processing-scaling-multi-source.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-194 128 1175.0698 319.59442"
17 sodipodi:docname="subdev-image-processing-scaling-multi-source.svg">
40 inkscape:pageshadow="2"
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
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/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2010 Realtek Corporation.*/
2898 "FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
2899 "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32",
2900 "MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
2901 "FCC", "2.4G", "20M", "CCK", "1T", "02", "36",
2902 "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32",
2903 "MKK", "2.4G", "20M", "CCK", "1T", "02", "32",
2904 "FCC", "2.4G", "20M", "CCK", "1T", "03", "36",
2905 "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32",
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/openbmc/linux/tools/perf/bench/
H A Dnuma.c1 // SPDX-License-Identifier: GPL-2.0
5 * numa: Simulate NUMA-sensitive workload and measure their NUMA performance
10 #include <subcmd/parse-options.h>
46 * Regular printout to the terminal, suppressed if -q is specified:
48 #define tprintf(x...) do { if (g && g->p.show_details >= 0) printf(x); } while (0)
54 #define dprintf(x...) do { if (g && g->p.show_details >= 1) printf(x); } while (0)
128 /* Affinity options -C and -N: */
134 /* Global, read-writable area, accessible to all processes and threads: */
162 static struct global_info *g = NULL; variable
173 OPT_STRING('G', "mb_global" , &p0.mb_global_str, "MB", "global memory (MBs)"),
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/openbmc/linux/drivers/iio/accel/
H A Dbma400.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * Read-Only Registers
63 * Read-write configuration registers
105 #define BMA400_INT_GEN1_MSK BIT(2)
112 #define BMA400_S_TAP_MSK BIT(2)
116 #define BMA400_TAP_SEN_MSK GENMASK(2, 0)
118 #define BMA400_TAP_QUIET_MSK GENMASK(3, 2)
123 * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
124 * converting to micro values for +-2g range.
126 * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
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/openbmc/qemu/hw/display/
H A Dvirtio-vga.c3 #include "hw/qdev-properties.h"
4 #include "hw/virtio/virtio-gpu.h"
7 #include "virtio-vga.h"
13 VirtIOGPUBase *g = vvga->vgpu; in virtio_vga_base_invalidate_display() local
15 if (g->enable) { in virtio_vga_base_invalidate_display()
16 g->hw_ops->invalidate(g); in virtio_vga_base_invalidate_display()
18 vvga->vga.hw_ops->invalidate(&vvga->vga); in virtio_vga_base_invalidate_display()
25 VirtIOGPUBase *g = vvga->vgpu; in virtio_vga_base_update_display() local
27 if (g->enable) { in virtio_vga_base_update_display()
28 g->hw_ops->gfx_update(g); in virtio_vga_base_update_display()
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/uml-utilities/uml-utilities-20040406/
H A D0001-makefiles-Append-to-CFLAGS-instead-of-re-assign.patch3 Date: Tue, 23 May 2023 14:40:31 -0700
4 Subject: [PATCH] makefiles: Append to CFLAGS instead of re-assign
8 Upstream-Status: Inappropriate [No upstream]
9 Signed-off-by: Khem Raj <raj.khem@gmail.com>
10 ---
11 jailtest/Makefile | 2 +-
12 mconsole/Makefile | 2 +-
13 moo/Makefile | 2 +-
14 port-helper/Makefile | 2 +-
15 tunctl/Makefile | 2 +-
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/openbmc/linux/drivers/staging/vc04_services/vchiq-mmal/
H A Dmmal-encodings.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4')
17 #define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3')
19 #define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V')
22 #define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2')
30 #define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G')
32 #define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G')
33 #define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ')
34 #define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ')
36 #define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ')
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/openbmc/linux/drivers/gpu/drm/exynos/
H A Dregs-gsc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* linux/drivers/gpu/drm/exynos/regs-gsc.h
7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
29 #define GSC_ENABLE_OP_STATUS (1 << 2)
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
41 #define GSC_IRQ_OR_MASK (1 << 2)
45 /* G-Scaler input control */
57 #define GSC_IN_ROT_YFLIP (2 << 16)
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/openbmc/linux/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
14 #define GSC_ENABLE_OP_STATUS (1 << 2)
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
37 #define GSC_IN_ROT_YFLIP (2 << 16)
41 #define GSC_IN_RGB_HD_WIDE (2 << 14)
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/openbmc/u-boot/include/
H A Dipu_pixfmt.h1 /* SPDX-License-Identifier: GPL-2.0+ */
8 * (C) Copyright 2005-2010 Freescale Semiconductor, Inc.
31 #define IPU_PIX_FMT_RGB332 fourcc('R', 'G', 'B', '1') /*< 8 RGB-3-3-2 */
32 #define IPU_PIX_FMT_RGB555 fourcc('R', 'G', 'B', 'O') /*< 16 RGB-5-5-5 */
33 #define IPU_PIX_FMT_RGB565 fourcc('R', 'G', 'B', 'P') /*< 1 6 RGB-5-6-5 */
34 #define IPU_PIX_FMT_RGB666 fourcc('R', 'G', 'B', '6') /*< 18 RGB-6-6-6 */
35 #define IPU_PIX_FMT_BGR666 fourcc('B', 'G', 'R', '6') /*< 18 BGR-6-6-6 */
36 #define IPU_PIX_FMT_BGR24 fourcc('B', 'G', 'R', '3') /*< 24 BGR-8-8-8 */
37 #define IPU_PIX_FMT_RGB24 fourcc('R', 'G', 'B', '3') /*< 24 RGB-8-8-8 */
38 #define IPU_PIX_FMT_BGR32 fourcc('B', 'G', 'R', '4') /*< 32 BGR-8-8-8-8 */
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/openbmc/linux/arch/x86/crypto/
H A Dsm3-avx-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
34 #define K1 -208106958 /* 0xf3988a32 */
35 #define K2 -416213915 /* 0xe7311465 */
36 #define K3 -832427829 /* 0xce6228cb */
37 #define K4 -1664855657 /* 0x9cc45197 */
40 #define K7 -433943364 /* 0xe6228cbc */
41 #define K8 -867886727 /* 0xcc451979 */
42 #define K9 -1735773453 /* 0x988a32f3 */
45 #define K12 -1001285732 /* 0xc451979c */
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H A Dsha256-ssse3-asm.S2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
58 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %xmm11 # shuffle xDxC -> DC00
92 INP = %rsi # 2nd arg
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H A Dsha256-avx2-asm.S2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
60 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %ymm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %ymm12 # shuffle xDxC -> DC00
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H A Dsha256-avx-asm.S2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
59 # Add reg to mem using reg-mem add and store
67 shld $(32-(\p1)), \p2, \p2
94 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
95 SHUF_DC00 = %xmm12 # shuffle xDxC -> DC00
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/openbmc/linux/drivers/staging/most/dim2/
H A Dhal.c1 // SPDX-License-Identifier: GPL-2.0
3 * hal.c - DIM2 HAL implementation
6 * Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
25 * Number of 32-bit units for DBR map.
28 * 2: block size is 256, max allocation is 8K
30 * 8: block size is 64, max allocation is 2K
35 #define DBR_MAP_SIZE 2
37 /* -------------------------------------------------------------------------- */
50 /* -------------------------------------------------------------------------- */
64 /* -------------------------------------------------------------------------- */
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/openbmc/u-boot/lib/
H A Dsha256.c1 // SPDX-License-Identifier: GPL-2.0+
3 * FIPS-180-2 compliant SHA-256 implementation
5 * Copyright (C) 2001-2003 Christophe Devine
15 #include <u-boot/sha256.h>
24 * 32-bit integer manipulation macros (big endian)
30 | ( (unsigned long) (b)[(i) + 2] << 8 ) \
38 (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
45 ctx->total[0] = 0; in sha256_starts()
46 ctx->total[1] = 0; in sha256_starts()
48 ctx->state[0] = 0x6A09E667; in sha256_starts()
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/openbmc/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
32 /* LARB 0 -- MMSYS */
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/openbmc/qemu/tests/qemu-iotests/
H A Dcommon.filter4 # Copyright (c) 2000-2001 Silicon Graphics, Inc. All Rights Reserved.
24 sed -Ee 's/[0-9]{4}-[0-9]{2}-[0-9]{2} [0-9]{2}:[0-9]{2}:[0-9]{2}/yyyy-mm-dd hh:mm:ss/'
29 sed -E -e 's/[0-9. ]{5} [KMGT]iB/ SIZE/' \
30 -e 's/[0-9. ]{5} B/ SIZE/'
35 sed -Ee 's/\#block[0-9]{3,}/NODE_NAME/'
40 gsed -e '/Attached to:/s/\device[[0-9]\+\]/device[N]/g'
46 sed -e "s#$TEST_DIR/#TEST_DIR/#g" \
47 -e "s#$SOCK_DIR/#SOCK_DIR/#g" \
48 -e "s#SOCK_DIR/fuse-#TEST_DIR/#g"
54 sed -e "s#$IMGFMT#IMGFMT#g"
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/openbmc/qemu/contrib/vhost-user-gpu/
H A Dvirgl.c2 * Virtio vhost-user GPU Device
4 * Copyright Red Hat, Inc. 2013-2018
9 * Marc-André Lureau <marcandre.lureau@redhat.com>
11 * This work is licensed under the terms of the GNU GPL, version 2 or later.
12 * See the COPYING file in the top-level directory.
22 vg_virgl_update_cursor_data(VuGpu *g, uint32_t resource_id, in vg_virgl_update_cursor_data() argument
38 virgl_cmd_context_create(VuGpu *g, in virgl_cmd_context_create() argument
50 virgl_cmd_context_destroy(VuGpu *g, in virgl_cmd_context_destroy() argument
61 virgl_cmd_create_resource_2d(VuGpu *g, in virgl_cmd_create_resource_2d() argument
70 args.target = 2; in virgl_cmd_create_resource_2d()
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