Home
last modified time | relevance | path

Searched defs:regSDMA1_QUEUE1_MIDCMD_DATA6_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_offset.h1203 #define regSDMA1_QUEUE1_MIDCMD_DATA6_BASE_IDX macro
H A Dgc_11_0_3_offset.h1215 #define regSDMA1_QUEUE1_MIDCMD_DATA6_BASE_IDX macro