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Searched defs:reg2 (Results 1 – 25 of 136) sorted by relevance

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/openbmc/linux/arch/arm/kernel/
H A Dhyp-stub.S31 .macro store_primary_cpu_mode reg1, reg2
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2
60 .macro compare_cpu_mode_with_primary mode, reg1, reg2
/openbmc/linux/arch/powerpc/kernel/
H A Dkvm_emul.S20 #define LL64(reg, offs, reg2) ld reg, (offs)(reg2) argument
21 #define STL64(reg, offs, reg2) std reg, (offs)(reg2) argument
23 #define LL64(reg, offs, reg2) lwz reg, (offs + 4)(reg2) argument
24 #define STL64(reg, offs, reg2) stw reg, (offs + 4)(reg2) argument
/openbmc/linux/arch/arm/probes/kprobes/
H A Dtest-core.h239 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
247 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
273 #define TEST_PR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
281 #define TEST_RP(code1, reg1, val1, code2, reg2, val2, code3) \ argument
289 #define TEST_PRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
298 #define TEST_RPR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
307 #define TEST_RRP(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
349 #define TEST_BF_RR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
393 #define TEST_RRX(code1, reg1, val1, code2, reg2, val2, code3, codex) \ argument
/openbmc/linux/arch/x86/events/intel/
H A Duncore_nhmex.c354 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_bbox_hw_config() local
381 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_bbox_msr_enable_event() local
445 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_sbox_hw_config() local
466 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_sbox_msr_enable_event() local
672 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; in nhmex_mbox_get_constraint() local
741 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; in nhmex_mbox_put_constraint() local
769 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; in nhmex_mbox_hw_config() local
839 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_mbox_msr_enable_event() local
982 struct hw_perf_event_extra *reg2 = &hwc->branch_reg; in nhmex_rbox_get_constraint() local
1090 struct hw_perf_event_extra *reg2 = &event->hw.branch_reg; in nhmex_rbox_hw_config() local
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/openbmc/linux/drivers/rtc/
H A Drtc-aspeed.c26 u32 reg1, reg2; in aspeed_rtc_read_time() local
56 u32 reg1, reg2, ctrl; in aspeed_rtc_set_time() local
/openbmc/linux/arch/s390/include/asm/
H A Dap.h136 unsigned long reg2; in ap_tapq() local
248 struct ap_config_info *reg2 = config; in ap_qci() local
301 unsigned long reg2 = pa_ind; in ap_aqic() local
349 unsigned long reg2; in ap_qact() local
404 unsigned long reg2 = sec_idx; in ap_aapq() local
496 unsigned long reg2; in ap_dqap() local
/openbmc/linux/arch/s390/kvm/
H A Dpriv.c260 int reg1, reg2; in handle_iske() local
307 int reg1, reg2; in handle_rrbe() local
358 int reg1, reg2; in handle_sske() local
453 int reg2; in handle_test_block() local
1011 int reg1, reg2; in handle_epsw() local
1041 int reg1, reg2; in handle_pfmf() local
H A Dintercept.c361 int reg1, reg2, rc; in handle_mvpg_pei() local
407 int reg1, reg2, cc = 0, r = 0; in handle_sthyi() local
/openbmc/linux/arch/parisc/kernel/
H A Dsyscall.S54 .macro lws_pagefault_disable reg1,reg2
62 .macro lws_pagefault_enable reg1,reg2
/openbmc/u-boot/arch/arm/mach-imx/
H A Dsip.c10 unsigned long reg1, unsigned long reg2) in call_imx_sip()
/openbmc/linux/crypto/
H A Daria_generic.c32 u32 reg0, reg1, reg2, reg3; in aria_set_encrypt_key() local
200 u32 reg0, reg1, reg2, reg3; in __aria_crypt() local
/openbmc/linux/arch/parisc/net/
H A Dbpf_jit.h103 #define hppa_or(reg1, reg2, target) \ argument
105 #define hppa_or_cond(reg1, reg2, cond, f, target) \ argument
107 #define hppa_and(reg1, reg2, target) \ argument
109 #define hppa_and_cond(reg1, reg2, cond, f, target) \ argument
111 #define hppa_xor(reg1, reg2, target) \ argument
113 #define hppa_add(reg1, reg2, target) \ argument
115 #define hppa_addc(reg1, reg2, target) \ argument
117 #define hppa_sub(reg1, reg2, target) \ argument
119 #define hppa_subb(reg1, reg2, target) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn302/
H A Dirq_service_dcn302.c195 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
213 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn21/
H A Dirq_service_dcn21.c215 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
229 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn314/
H A Dirq_service_dcn314.c210 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
224 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn31/
H A Dirq_service_dcn31.c208 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
222 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn32/
H A Dirq_service_dcn32.c209 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
223 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn30/
H A Dirq_service_dcn30.c220 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
234 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/sound/pci/
H A Dak4531_codec.c198 #define AK4531_INPUT_SW(xname, xindex, reg1, reg2, left_shift, right_shift) \ argument
217 int reg2 = (kcontrol->private_value >> 8) & 0xff; in snd_ak4531_get_input_sw() local
234 int reg2 = (kcontrol->private_value >> 8) & 0xff; in snd_ak4531_put_input_sw() local
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_pmdemand.c387 u32 reg1, reg2; in intel_pmdemand_init_pmdemand_params() local
471 u32 *reg1, u32 *reg2, bool serialized) in intel_pmdemand_update_params()
525 u32 reg2, mod_reg2; in intel_pmdemand_program_params() local
/openbmc/linux/arch/sparc/lib/
H A Dcopy_page.S38 #define TOUCH(reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7) \ argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn315/
H A Dirq_service_dcn315.c215 #define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2)\ argument
229 #define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2)\ argument
/openbmc/linux/arch/arm64/crypto/
H A Dcrct10dif-ce-core.S218 .macro fold_32_bytes, p, reg1, reg2
/openbmc/linux/sound/soc/codecs/
H A Drt700-sdw.c90 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt700_sdw_read() local
212 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; in rt700_sdw_write() local
H A Drt711-sdw.c94 unsigned int reg2 = 0, reg3 = 0, reg4 = 0, mask, nid, val2; in rt711_sdw_read() local
216 unsigned int reg2 = 0, reg3, reg4, nid, mask, val2; in rt711_sdw_write() local

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