| /openbmc/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rv1108.c | 306 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_aclk_bus_get_clk() local
318 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_aclk_bus_set_clk() local
334 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_aclk_peri_get_clk() local
346 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_hclk_peri_get_clk() local
358 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_pclk_peri_get_clk() local
370 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_aclk_peri_set_clk() local
386 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_hclk_peri_set_clk() local
401 ulong parent_rate = rkclk_pll_get_rate(cru, CLK_GENERAL); in rv1108_pclk_peri_set_clk() local
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| H A D | clk_rk3368.c | 221 ulong parent_rate = parents[i].rate; in rk3368_mmc_find_best_rate_and_parent() local
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| /openbmc/u-boot/drivers/clk/sifive/ |
| H A D | wrpll-cln28hpc.c | 196 unsigned long parent_rate) in __wrpll_update_parent_rate()
242 unsigned long parent_rate) in analogbits_wrpll_configure_for_rate()
359 unsigned long parent_rate) in analogbits_wrpll_calc_output_rate()
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| H A D | fu540-prci.c | 403 unsigned long parent_rate) in sifive_fu540_prci_wrpll_recalc_rate()
413 unsigned long *parent_rate) in sifive_fu540_prci_wrpll_round_rate()
427 unsigned long parent_rate) in sifive_fu540_prci_wrpll_set_rate()
464 unsigned long parent_rate) in sifive_fu540_prci_tlclksel_recalc_rate()
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_meson_axg.c | 83 unsigned long parent_rate; in meson_clk81_get_rate() local
117 static long mpll_rate_from_params(unsigned long parent_rate, in mpll_rate_from_params()
155 unsigned long parent_rate; in meson_mpll_get_rate() local
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| H A D | clk_meson.c | 271 unsigned int rate, parent_rate; in meson_div_get_rate() local
320 unsigned long parent_rate; in meson_div_set_rate() local
570 unsigned long parent_rate; in meson_clk81_get_rate() local
605 static long mpll_rate_from_params(unsigned long parent_rate, in mpll_rate_from_params()
643 unsigned long parent_rate; in meson_mpll_get_rate() local
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| H A D | clk_pic32.c | 170 int parent_rate, int rate, int parent_id) in pic32_set_refclk()
231 u32 rodiv, rotrim, rosel, v, parent_rate; in pic32_get_refclk() local
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| H A D | clk-hsdk-cgu.c | 510 ulong parent_rate = pll_get(sclk); in idiv_get() local
614 ulong parent_rate = pll_get(sclk); in idiv_set() local
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| /openbmc/u-boot/arch/arm/mach-tegra/ |
| H A D | clock.c | 245 static int clk_get_divider(unsigned divider_bits, unsigned long parent_rate, in clk_get_divider()
299 static unsigned long get_rate_from_divider(unsigned long parent_rate, in get_rate_from_divider()
313 unsigned parent_rate = pll_rate[parent]; in clock_get_periph_rate() local
368 static int find_best_divider(unsigned divider_bits, unsigned long parent_rate, in find_best_divider()
527 unsigned int __weak clk_m_get_rate(unsigned int parent_rate) in clk_m_get_rate()
536 u64 parent_rate, rate; in clock_get_rate() local
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| /openbmc/u-boot/drivers/clk/at91/ |
| H A D | clk-plladiv.c | 43 ulong parent_rate; in at91_plladiv_clk_set_rate() local
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| H A D | clk-generated.c | 82 ulong tmp_rate, best_rate = rate, parent_rate; in generic_clk_set_rate() local
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| /openbmc/u-boot/drivers/clk/uniphier/ |
| H A D | clk-uniphier-core.c | 183 unsigned long parent_rate; in __uniphier_clk_set_rate() local
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| /openbmc/u-boot/drivers/clk/mvebu/ |
| H A D | armada-37xx-periph.c | 364 const struct clk_div_table *t1, ulong parent_rate, in find_best_div()
390 ulong rate, old_rate, parent_rate; in armada_37xx_periph_clk_set_rate() local
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| /openbmc/u-boot/drivers/video/ |
| H A D | ipu_common.c | 306 u64 parent_rate = (unsigned long long)clk->parent->rate * 16; in ipu_pixel_clk_round_rate() local
337 u64 div, parent_rate; in ipu_pixel_clk_set_rate() local
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| /openbmc/u-boot/drivers/clk/mediatek/ |
| H A D | clk-mtk.c | 259 ulong parent_rate) in mtk_factor_recalc_rate()
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| /openbmc/u-boot/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 724 u32 parent_rate = get_emi_slow_clk(); in config_nfc_clk() local
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| /openbmc/u-boot/arch/arm/mach-tegra/tegra210/ |
| H A D | clock.c | 1033 unsigned int clk_m_get_rate(unsigned parent_rate) in clk_m_get_rate()
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