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Searched defs:mmUVD_MPC_SET_MUXA1 (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_4_2_d.h55 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
H A Duvd_4_0_d.h57 #define mmUVD_MPC_SET_MUXA1 0x3D7A macro
H A Duvd_3_1_d.h57 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
H A Duvd_5_0_d.h61 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
H A Duvd_6_0_d.h77 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
H A Duvd_7_0_offset.h168 #define mmUVD_MPC_SET_MUXA1 … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h348 #define mmUVD_MPC_SET_MUXA1 … macro
H A Dvcn_2_5_offset.h763 #define mmUVD_MPC_SET_MUXA1 … macro
H A Dvcn_2_0_0_offset.h598 #define mmUVD_MPC_SET_MUXA1 … macro
H A Dvcn_3_0_0_offset.h1143 #define mmUVD_MPC_SET_MUXA1 … macro