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Searched defs:mmUVD_DPG_LMA_MASK_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h41 #define mmUVD_DPG_LMA_MASK_BASE_IDX … macro
H A Dvcn_2_5_offset.h414 #define mmUVD_DPG_LMA_MASK_BASE_IDX … macro
H A Dvcn_2_0_0_offset.h399 #define mmUVD_DPG_LMA_MASK_BASE_IDX … macro
H A Dvcn_3_0_0_offset.h690 #define mmUVD_DPG_LMA_MASK_BASE_IDX … macro