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Searched defs:mmSDMA0_UTCL1_WR_STATUS_DEFAULT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_default.h81 #define mmSDMA0_UTCL1_WR_STATUS_DEFAULT 0x503001ff macro
H A Dsdma0_4_0_default.h82 #define mmSDMA0_UTCL1_WR_STATUS_DEFAULT 0x503001ff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_default.h68 #define mmSDMA0_UTCL1_WR_STATUS_DEFAULT 0x51011555 macro
H A Dgc_10_3_0_default.h67 #define mmSDMA0_UTCL1_WR_STATUS_DEFAULT 0x51011555 macro