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Searched defs:mmDC_I2C_DDC4_HW_STATUS (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h1323 #define mmDC_I2C_DDC4_HW_STATUS 0x1820 macro
H A Ddce_8_0_d.h3549 #define mmDC_I2C_DDC4_HW_STATUS 0x1820 macro
H A Ddce_10_0_d.h7163 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
H A Ddce_11_0_d.h7353 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
H A Ddce_11_2_d.h8745 #define mmDC_I2C_DDC4_HW_STATUS 0x16db macro
H A Ddce_12_0_offset.h1650 #define mmDC_I2C_DDC4_HW_STATUS … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_offset.h7414 #define mmDC_I2C_DDC4_HW_STATUS … macro
H A Ddcn_1_0_offset.h7681 #define mmDC_I2C_DDC4_HW_STATUS … macro
H A Ddcn_2_1_0_offset.h9275 #define mmDC_I2C_DDC4_HW_STATUS … macro
H A Ddcn_3_0_2_offset.h8961 #define mmDC_I2C_DDC4_HW_STATUS … macro
H A Ddcn_2_0_0_offset.h10306 #define mmDC_I2C_DDC4_HW_STATUS … macro
H A Ddcn_3_0_0_offset.h10035 #define mmDC_I2C_DDC4_HW_STATUS … macro