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Searched defs:ixSQ_WAVE_STATUS (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h89 #define ixSQ_WAVE_STATUS 0x0012 macro
H A Dgfx_7_2_d.h1934 #define ixSQ_WAVE_STATUS 0x12 macro
H A Dgfx_7_0_d.h1913 #define ixSQ_WAVE_STATUS 0x12 macro
H A Dgfx_8_0_d.h2133 #define ixSQ_WAVE_STATUS 0x12 macro
H A Dgfx_8_1_d.h2101 #define ixSQ_WAVE_STATUS 0x12 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h7098 #define ixSQ_WAVE_STATUS … macro
H A Dgc_9_2_1_offset.h7345 #define ixSQ_WAVE_STATUS … macro
H A Dgc_9_1_offset.h7306 #define ixSQ_WAVE_STATUS … macro
H A Dgc_9_4_2_offset.h7646 #define ixSQ_WAVE_STATUS … macro
H A Dgc_9_4_3_offset.h7408 #define ixSQ_WAVE_STATUS … macro
H A Dgc_10_1_0_offset.h11177 #define ixSQ_WAVE_STATUS … macro
H A Dgc_11_0_0_offset.h11638 #define ixSQ_WAVE_STATUS … macro
H A Dgc_11_0_3_offset.h12055 #define ixSQ_WAVE_STATUS … macro
H A Dgc_10_3_0_offset.h13423 #define ixSQ_WAVE_STATUS … macro